Inventor
ALVARADO REYNANTE TAMUNAN
US9 patents
Patents
9 patentsUS9171782B2Oct 27, 2015
Stacked redistribution layers on die
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US10163687B2Dec 25, 2018
System, apparatus, and method for embedding a 3D component with an interconnect structure
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US10141202B2Nov 27, 2018
Semiconductor device comprising mold for top side and sidewall protection
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US9985010B2May 29, 2018
System, apparatus, and method for embedding a device in a faceup workpiece
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US9379065B2Jun 28, 2016
Crack stopping structure in wafer level packaging (WLP)
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US9209110B2Dec 8, 2015
Integrated device comprising wires as vias in an encapsulation layer
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US9806052B2Oct 31, 2017
Semiconductor package interconnect
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US11545411B2Jan 3, 2023
Package comprising wire bonds configured as a heat spreader
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US9806048B2Oct 31, 2017
Planar fan-out wafer level packaging
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