Inventor

STUECHELI JEFFREY A

US160 patents

⚠️ This page may combine multiple inventors who share the name “STUECHELI JEFFREY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

STUECHELI JEFFREY A

IBM

Method and cache system with soft I-MRU member protection scheme during make MRU allocation

Dynamically adjusting read data return sizes based on memory interface bus utilization

Data processing system, cache system and method for issuing a request on an interconnect fabric without reference to a lower level cache based upon a tagged cache state

Integrated circuit and data processing system having a configurable cache directory for an accelerator

Comparison-based sort in a reconfigurable array processor having multiple processing elements for sorting array elements

Comparison-based sort in a reconfigurable array processor having multiple processing elements for sorting array elements

Hybrid replacement policy in a multilevel cache memory hierarchy

Counter-based victim selection in a cache memory

Counter-based victim selection in a cache memory

Expedited servicing of store operations in a data processing system

Push instruction for pushing a message payload from a sending thread to a receiving thread

Provision of early data from a lower level cache memory

Transient condition management utilizing a posted error detection processing protocol

Reducing number of rejected snoop requests by extending time to respond to snoop request

Protecting ownership transfer with non-uniform protection windows

System and method for improving the page crossing performance of a data prefetcher

Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a location of a memory

Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a history-based prediction

Victim cache replacement

Empirically based dynamic control of transmission of victim cache lateral castouts

Dynamically adjusting read data return sizes based on interconnect bus utilization

Data processing system, method and interconnect fabric for selective link information allocation in a data processing system

Secure memory implementation for secure execution of virtual machines

Secure memory implementation for secure execution of Virtual Machines

Managing lowest point of coherency (LPC) memory using a service layer adapter

Secure memory implementation for secure execution of virtual machines

Pre-transmission data reordering for a serial interface

Non-serialized push instruction for pushing a message payload from a sending thread to a receiving thread

Expedited servicing of store operations in a data processing system

Expedited servicing of store operations in a data processing system

Expedited servicing of store operations in a data processing system

Peripheral component interconnect express (PCIE) pseudo-virtual channels and non-blocking writes

Modification of prefetch depth based on high latency event

Least-recently-used (LRU) to first-dirty-member distance-maintaining cache cleaning scheduler

Coherent attached processor proxy having hybrid directory

Translation invalidation in a translation cache serving an accelerator

Decreasing the data handoff interval for a reserved cache line based on an early indication of a systemwide coherence response

Tracking memory accesses when invalidating effective address to real address translations

Intercomponent data communication between multiple time zones

Dynamic reservations in a unified request queue

DALY DAVID M

Weighted history allocation predictor algorithm in a hybrid cache

Weighted history allocation predictor algorithm in a hybrid cache

Dynamic inclusive policy in a hybrid cache hierarchy using hit rate

Memory bus write prioritization

GUTHRIE GUY L

Victim cache line selection

Victim cache prefetching

Mode-based castout destination selection

GLOBALFOUNDRIES INC

Dynamic write priority based on virtual write queue high water mark for set associative cache using cache cleaner when modified sets exceed threshold

CANTIN JASON F

Access speculation predictor with predictions based on memory region prior requestor tag information

CLARK LEO J

Ticket-based operation tracking