Inventor
SIEG STUART
US12 patents
Patents
12 patentsUS12444653B2Oct 14, 2025
Buried power rail at tight cell-to-cell space
IBM2 citations74
US12593668B2Mar 31, 2026
Shallow and deep contacts with stitching
IBM0 citations62
US12581702B2Mar 17, 2026
Common self aligned gate contact for stacked transistor structures
IBM0 citations62
US11990412B2May 21, 2024
Buried power rails located in a base layer including first, second, and third etch stop layers
IBM1 citations62
US11205723B2Dec 21, 2021
Selective source/drain recess for improved performance, isolation, and scaling
IBM1 citations62
US12080559B2Sep 3, 2024
Using a same mask for direct print and self-aligned double patterning of nanosheets
IBM0 citations61
US11257681B2Feb 22, 2022
Using a same mask for direct print and self-aligned double patterning of nanosheets
IBM0 citations61
US12148617B2Nov 19, 2024
Structure and method to pattern pitch lines
IBM0 citations52
US12563817B2Feb 24, 2026
Integrating gate-cuts and single diffusion break isolation post-RMG using low-temperature protective liners
IBM0 citations51
US12406930B2Sep 2, 2025
Structure containing a via-to-buried power rail contact structure or a via-to-backside power rail contact structure
IBM0 citations51
US12324236B2Jun 3, 2025
Bottom contact for stacked GAA FET
IBM0 citations51
US12268026B2Apr 1, 2025
High aspect ratio contact structure with multiple metal stacks
IBM0 citations51