Inventor
RAJAN SREERANGA P
US35 patents
⚠️ This page may combine multiple inventors who share the name “RAJAN SREERANGA P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LI GUODONG
6 patentsUS8595701B2Nov 26, 2013
Symbolic execution and test generation for GPU programs
LI GUODONG30 citations92
US8869113B2Oct 21, 2014
Software architecture for validating C++ programs using symbolic execution
LI GUODONG8 citations84
US8645924B2Feb 4, 2014
Lossless path reduction for efficient symbolic execution and automatic test generation
LI GUODONG14 citations84
US8943487B2Jan 27, 2015
Optimizing libraries for validating C++ programs using symbolic execution
LI GUODONG6 citations73
US9038032B2May 19, 2015
Symbolic execution and automatic test case generation for JavaScript programs
LI GUODONG4 citations72
US9501331B2Nov 22, 2016
Satisfiability checking
LI GUODONG1 citations52
YODLEE INC
5 patentsUS7178096B2Feb 13, 2007
Method and apparatus for providing calculated and solution-oriented personalized summary-reports to a user through a single user-interface
YODLEE INC159 citations99
US6802042B2Oct 5, 2004
Method and apparatus for providing calculated and solution-oriented personalized summary-reports to a user through a single user-interface
YODLEE INC247 citations99
US6278993B1Aug 21, 2001
Method and apparatus for extending an on-line internet search beyond pre-referenced sources and returning data over a data-packet-network (DPN) using private search engines as proxy-engines
YODLEE INC390 citations99
US6510451B2Jan 21, 2003
System for completing a multi-component task initiated by a client involving Web sites without requiring interaction from the client
YODLEE INC227 citations98
US6477565B1Nov 5, 2002
Method and apparatus for restructuring of personalized data for transmission from a data network to connected and portable network appliances
YODLEE INC274 citations98
FUJITSU LTD
5 patentsUS8359576B2Jan 22, 2013
Using symbolic execution to check global temporal requirements in an application
FUJITSU LTD41 citations94
US7283945B2Oct 16, 2007
High level verification of software and hardware descriptions by symbolic simulation using assume-guarantee relationships with linear arithmetic assumptions
FUJITSU LTD20 citations92
US7685471B2Mar 23, 2010
System and method for detecting software defects
FUJITSU LTD10 citations84
US7275231B2Sep 25, 2007
High level validation of designs and products
FUJITSU LTD14 citations81
US8347320B2Jan 1, 2013
Generating a driver for analysis of an event-driven application
FUJITSU LTD0 citations41
YODLEE COM
4 patentsUS7424520B2Sep 9, 2008
Method and apparatus for restructuring of personalized data for transmission from a data network to connected and portable network appliances
YODLEE COM118 citations98
US7263548B2Aug 28, 2007
Method and apparatus for restructuring of personalized data for transmission from a data network to connected and portable network appliances
YODLEE COM118 citations98
US7085997B1Aug 1, 2006
Network-based bookmark management and web-summary system
YODLEE COM136 citations98
US6725425B1Apr 20, 2004
Method and apparatus for retrieving information from semi-structured, web-based data sources
YODLEE COM198 citations98
PRASAD MUKUL R
4 patentsUS8479170B2Jul 2, 2013
Generating software application user-input data through analysis of client-tier source code
PRASAD MUKUL R7 citations84
US8271953B2Sep 18, 2012
System and method for providing middleware for capture of global requirements and validation for web applications
PRASAD MUKUL R8 citations84
US9104809B2Aug 11, 2015
Facilitating automated validation of a web application
PRASAD MUKUL R4 citations73
US8255384B2Aug 28, 2012
Client-tier validation of dynamic web applications
PRASAD MUKUL R5 citations63
RAJAN SREERANGA P
3 patentsUS8453117B2May 28, 2013
Providing software validation as a service
RAJAN SREERANGA P7 citations80
US9477928B2Oct 25, 2016
System and method for comparing software frameworks
RAJAN SREERANGA P2 citations61
US8468537B2Jun 18, 2013
Systems and methods for distributing validation computations
RAJAN SREERANGA P0 citations46
LSI LOGIC CORP
2 patentsUS5222030AJun 22, 1993
Methodology for deriving executable low-level structural descriptions and valid physical implementations of circuits and systems from high-level semantic specifications and descriptions thereof
LSI LOGIC CORP130 citations96
US5526277AJun 11, 1996
ECAD system for deriving executable low-level structural descriptions and valid physical implementations of circuits and systems from high-level semantic descriptions thereof
LSI LOGIC CORP44 citations94