Inventor

WANG SEONGMOON

US17 patents

⚠️ This page may combine multiple inventors who share the name “WANG SEONGMOON”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WANG SEONGMOON

NEC LAB AMERICA INC

Method for generating, from a test cube set, a generator configured to generate a test pattern

Method and apparatus for testing logic circuit designs

Scalable scan-path test point insertion technique

Test output compaction with improved blocking of unknown values

Externally-loaded weighted random test pattern compression

Restricted scan reordering technique to enhance delay fault coverage

Method and apparatus for testing logic circuit designs

Test output compaction using response shaper

Method and apparatus for structured ASIC test point insertion

Hybrid scan-based delay testing technique for compact and high fault coverage test set

Test pattern compression with pattern-independent design-independent seed compression

Method for blocking unknown values in output response of scan test patterns for testing circuits

Test output compaction for responses with unknown values

Test data compression method for system-on-chip using linear-feedback shift register reseeding

NEC CORP

Low hardware overhead scan based 3-weight weighted random BIST architectures

Re-configurable embedded core test protocol for system-on-chips (SOC) and circuit boards

WANG SEONGMOON

Systems and methods for locating defective components of a circuit