Inventor
LANDRU DIDIER
FR58 patents
⚠️ This page may combine multiple inventors who share the name “LANDRU DIDIER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SOITEC SILICON ON INSULATOR
33 patentsUS9914233B2Mar 13, 2018
Device for separating two substrates
SOITEC SILICON ON INSULATOR12 citations84
US11349065B2May 31, 2022
Method for manufacturing a hybrid structure
SOITEC SILICON ON INSULATOR3 citations73
US10250282B2Apr 2, 2019
Structure for radiofrequency applications
SOITEC SILICON ON INSULATOR3 citations73
US8735946B2May 27, 2014
Substrate having a charged zone in an insulating buried layer
SOITEC SILICON ON INSULATOR4 citations71
US12094759B2Sep 17, 2024
Method for transferring blocks from a donor substrate onto a receiver substrate by implanting ions in the donor substrate through a mask, bonding the donor substrate to the receiver substrate, and detaching the donor substrate along an embrittlement plane
SOITEC SILICON ON INSULATOR0 citations63
US11776843B2Oct 3, 2023
Method for transferring blocks from a donor substrate onto a receiver substrate by implanting ions in the donor substrate through a mask, bonding the donor substrate to the receiver substrate, and detaching the donor substrate along an embrittlement plane
SOITEC SILICON ON INSULATOR0 citations63
US7892951B2Feb 22, 2011
SOI substrates with a fine buried insulating layer
SOITEC SILICON ON INSULATOR6 citations63
US12490656B2Dec 2, 2025
Hybrid structure and a method for manufacturing the same
SOITEC SILICON ON INSULATOR0 citations62
US12165900B2Dec 10, 2024
Method of mechanical separation for a double layer transfer
SOITEC SILICON ON INSULATOR0 citations62
US12002690B2Jun 4, 2024
System for fracturing a plurality of wafer assemblies
SOITEC SILICON ON INSULATOR0 citations62
US11930710B2Mar 12, 2024
Hybrid structure and a method for manufacturing the same
SOITEC SILICON ON INSULATOR0 citations62
US11742233B2Aug 29, 2023
Method of mechanical separation for a double layer transfer
SOITEC SILICON ON INSULATOR0 citations62
US11239108B2Feb 1, 2022
Method for producing a donor substrate for creating a three-dimensional integrated structure, and method for producing such an integrated structure
SOITEC SILICON ON INSULATOR0 citations62
US10910250B2Feb 2, 2021
Method of mechanical separation for a double layer transfer
SOITEC SILICON ON INSULATOR0 citations62
US9437473B2Sep 6, 2016
Method for separating at least two substrates along a selected interface
SOITEC SILICON ON INSULATOR2 citations62
US12002697B2Jun 4, 2024
Method for detecting the splitting of a substrate weakened by implanting atomic species
SOITEC SILICON ON INSULATOR0 citations60
US11670540B2Jun 6, 2023
Substrates including useful layers
SOITEC SILICON ON INSULATOR0 citations60
US9136113B2Sep 15, 2015
Process to dissolve the oxide layer in the peripheral ring of a structure of semiconductor-on-insulator type
SOITEC SILICON ON INSULATOR3 citations60
US11424156B2Aug 23, 2022
Removable structure and removal method using the structure
SOITEC SILICON ON INSULATOR0 citations56
US11742817B2Aug 29, 2023
Process for transferring a thin layer to a support substrate that have different thermal expansion coefficients
SOITEC SILICON ON INSULATOR1 citations55
US12563996B2Feb 24, 2026
Holding device for an assembly that is to be fractured
SOITEC SILICON ON INSULATOR0 citations52
US12142517B2Nov 12, 2024
Method for transferring a useful layer from a donor substrate onto a support substrate by applying a predetermined stress
SOITEC SILICON ON INSULATOR0 citations52
US11881429B2Jan 23, 2024
Method for transferring a useful layer onto a support substrate
SOITEC SILICON ON INSULATOR0 citations52
US11276605B2Mar 15, 2022
Process for smoothing the surface of a semiconductor-on-insulator substrate
SOITEC SILICON ON INSULATOR0 citations52
US11219851B2Jan 11, 2022
Vertical furnace with device for trapping contaminants
SOITEC SILICON ON INSULATOR0 citations52
US10093086B2Oct 9, 2018
Method for separating at least two substrates along a selected interface
SOITEC SILICON ON INSULATOR0 citations52
US9911624B2Mar 6, 2018
Method for dissolving a silicon dioxide layer
SOITEC SILICON ON INSULATOR0 citations52
US9607879B2Mar 28, 2017
Process for fabrication of a structure with a view to a subsequent separation
SOITEC SILICON ON INSULATOR1 citations52
US9514960B2Dec 6, 2016
Method for dissolving a silicon dioxide layer
SOITEC SILICON ON INSULATOR0 citations52
US10134602B2Nov 20, 2018
Process for smoothing the surface of a structure
SOITEC SILICON ON INSULATOR0 citations51
US9589830B2Mar 7, 2017
Method for transferring a useful layer
SOITEC SILICON ON INSULATOR0 citations50
US12320031B2Jun 3, 2025
Method for manufacturing a composite structure comprising a thin layer made of monocrystalline SiC on a carrier substrate made of SiC
SOITEC SILICON ON INSULATOR0 citations49
US12198983B2Jan 14, 2025
Method for producing a composite structure comprising a thin layer of monocrystalline sic on a carrier substrate of polycrystalline SiC
SOITEC SILICON ON INSULATOR0 citations49
LANDRU DIDIER
8 patentsUS9224704B2Dec 29, 2015
Process for realizing a connecting structure
LANDRU DIDIER229 citations98
US8614501B2Dec 24, 2013
Method of producing a layer of cavities
LANDRU DIDIER6 citations73
US8623740B2Jan 7, 2014
Method of detaching semi-conductor layers at low temperature
LANDRU DIDIER6 citations70
US10220603B2Mar 5, 2019
Method for separating a layer from a composite structure
LANDRU DIDIER1 citations62
US8513092B2Aug 20, 2013
Method for producing a stack of semi-conductor thin films
LANDRU DIDIER3 citations62
US8429960B2Apr 30, 2013
Process for measuring an adhesion energy, and associated substrates
LANDRU DIDIER3 citations62
US8497190B2Jul 30, 2013
Process for treating a semiconductor-on-insulator structure
LANDRU DIDIER4 citations59
US9198294B2Nov 24, 2015
Electronic device for radiofrequency or power applications and process for manufacturing such a device
LANDRU DIDIER3 citations57
SADAKA MARIAM
2 patentsUS8716105B2May 6, 2014
Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures and intermediate structures formed using such methods
SADAKA MARIAM219 citations99
US8501537B2Aug 6, 2013
Methods for bonding semiconductor structures involving annealing processes, and bonded semiconductor structures formed using such methods
SADAKA MARIAM221 citations98
COMMISSARIAT ENERGIE ATOMIQUE
2 patentsSHAHEEN MOHAMAD
1 patentLETERTRE FABRICE
1 patentRIOU GREGORY
1 patentVEYTIZOU CHRISTELLE
1 patentCOMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
1 patentShowing the top 50 of 58 patents by PatentIndex Score.