Inventor

MARIANI MARCELLO

IT64 patents

⚠️ This page may combine multiple inventors who share the name “MARIANI MARCELLO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MARIANI MARCELLO

MICRON TECHNOLOGY INC

Ferroelectric memory cell recovery

Ferroelectric memory cell recovery

Memory devices and methods of forming memory devices

Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls and methods of forming a memory device comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls

Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls and methods of forming a memory device comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls

Methods of forming an array of gated devices

Methods of forming gated devices

Memory devices and methods of forming memory devices

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies having shield lines between neighboring transistor active regions

Integrated transistors having gate material passing through a pillar of semiconductor material, and methods of forming integrated transistors

Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls and methods of forming a memory device comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls

Ferroelectric memory cell recovery

Ferroelectric memory cell recovery

Ferroelectric memory cell recovery

Array of gated devices and methods of forming an array of gated devices

Array of gated devices and methods of forming an array of gated devices

Methods of forming an array of gated devices

Method of making a floating gate non-volatile MOS semiconductor memory device with improved capacitive coupling

Memory devices and methods of forming memory devices

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies having shield lines between neighboring transistor active regions

Integrated assemblies and methods of forming integrated assemblies

Integrated transistors having gate material passing through a pillar of semiconductor material, and methods of forming integrated transistors

Integrated assemblies and methods of forming integrated assemblies

Memory devices and methods of forming memory devices

Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls and methods of forming a memory device comprising magnetic tracks individually comprising a plurality of magnetic domains having domain walls

Integrated assemblies and methods of forming integrated assemblies

Integrated assemblies and methods of forming integrated assemblies

Integrated transistors having gate material passing through a pillar of semiconductor material, and methods of forming integrated transistors

Array of capacitors, an array of memory cells, method used in forming an array of memory cells, methods used in forming an array of capacitors, and methods used in forming a plurality of horizontally-spaced conductive lines

Methods of incorporating leaker devices into capacitor configurations to reduce cell disturb, and capacitor configurations incorporating leaker devices

Array of capacitors, an array of memory cells, method used in forming an array of memory cells, methods used in forming an array of capacitors, and methods used in forming a plurality of horizontally-spaced conductive lines

Array of gated devices and methods of forming an array of gated devices

Method, system and device for recessed contact in memory array

Methods of forming integrated circuit devices

Methods of forming gated devices

Array of vertical transistors, an array of memory cells comprising an array of vertical transistors, and a method used in forming an array of vertical transistors

Array of vertical transistors, an array of memory cells comprising an array of vertical transistors, and a method used in forming an array of vertical transistors

Vertical devices and methods of forming

Formation for memory cells

Differential storage in memory arrays

Techniques to manufacture ferroelectric memory devices

Transistors, memory arrays, and methods used in forming an array of memory cells individually comprising a transistor

MEOTTO UMBERTO M

Method of fabricating a charge trap NAND flash memory

ST MICROELECTRONICS SRL

Method for manufacturing semiconductor integrated circuit structures

MARIANI MARCELLO

Methods of forming electrical contacts

INTEL CORP

Self-aligned vertical bipolar junction transistor for phase change memories

FILIPPINI ANDREA

Vertical devices and methods of forming

GROSSI ALESSANDRO

Shallow trench isolation for a memory