Inventor
GUJRAL MANOJ
US10 patents
⚠️ This page may combine multiple inventors who share the name “GUJRAL MANOJ”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
UNISYS CORP
7 patentsUS6223260B1Apr 24, 2001
Multi-bus data processing system in which all data words in high level cache memories have any one of four states and all data words in low level cache memories have any one of three states
UNISYS CORP87 citations92
US5761446AJun 2, 1998
Livelock avoidance
UNISYS CORP28 citations92
US6032231AFeb 29, 2000
Multiprocessor with split transaction bus architecture providing cache tag and address compare for sending retry direction to other bus module upon a match of subsequent address bus cycles to content of cache tag
UNISYS CORP41 citations91
US5732244AMar 24, 1998
Multiprocessor with split transaction bus architecture for sending retry direction to other bus module upon a match of subsequent address bus cycles to content of cache tag
UNISYS CORP20 citations91
US5638015AJun 10, 1997
Avoiding instability
UNISYS CORP28 citations90
US5758104AMay 26, 1998
Random delay subsystems
UNISYS CORP13 citations73
US5896052AApr 20, 1999
Methods to avoid instability
UNISYS CORP14 citations71