P

Inventor

MALLADI RAMANA M

US26 patents
⚠️ This page may combine multiple inventors who share the name “MALLADI RAMANA M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

21 patents
US9917591B2Mar 13, 2018

Digital phase locked loop for low jitter applications

IBM12 citations92
US9906228B2Feb 27, 2018

Digital phase locked loop for low jitter applications

IBM12 citations92
US9819350B2Nov 14, 2017

Digital phase locked loop for low jitter applications

IBM11 citations92
US9806723B2Oct 31, 2017

Digital phase locked loop for low jitter applications

IBM13 citations92
US9455728B2Sep 27, 2016

Digital phase locked loop for low jitter applications

IBM11 citations92
US10084460B2Sep 25, 2018

Digital phase locked loop for low jitter applications

IBM3 citations83
US10063243B2Aug 28, 2018

Digital phase locked loop for low jitter applications

IBM2 citations83
US10686452B2Jun 16, 2020

Digital phase locked loop for low jitter applications

IBM3 citations82
US10103739B2Oct 16, 2018

Digital phase locked loop for low jitter applications

IBM0 citations62
US8912854B2Dec 16, 2014

Structure for an inductor-capacitor voltage-controlled oscillator

IBM2 citations62
US10958276B2Mar 23, 2021

Digital phase locked loop for low jitter applications

IBM0 citations61
US10566981B2Feb 18, 2020

Digital phase locked loop for low jitter applications

IBM0 citations61
US10164647B2Dec 25, 2018

Digital phase locked loop for low jitter applications

IBM0 citations61
US9564508B2Feb 7, 2017

Device isolation with improved thermal conductivity

IBM0 citations52
US9252717B2Feb 2, 2016

Phase noise reduction in LC-VCO

IBM0 citations52
US9159801B2Oct 13, 2015

Bipolar junction transistor with multiple emitter fingers

IBM0 citations52
US9076810B2Jul 7, 2015

Scaling of bipolar transistors

IBM0 citations52
US8928418B2Jan 6, 2015

Compensating for process variation in integrated circuit fabrication

IBM1 citations52
US8652919B2Feb 18, 2014

Tunable semiconductor device

IBM0 citations52
US10693471B2Jun 23, 2020

Digital phase locked loop for low jitter applications

IBM0 citations51
US10615806B2Apr 7, 2020

Digital phase locked loop for low jitter applications

IBM0 citations48

MALLADI RAMANA M

2 patents

DAHLSTROM MATTIAS E

1 patent

GLOBALFOUNDRIES INC

1 patent

CAMILLO-CASTILLO RENATA

1 patent