Inventor
VADI VASISHT MANTRA
US30 patents
Patents
30 patentsUS7126372B2Oct 24, 2006
Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfiguration
XILINX INC151 citations99
US7233169B1Jun 19, 2007
Bidirectional register segmented data busing
XILINX INC68 citations98
US7218137B2May 15, 2007
Reconfiguration port for dynamic reconfiguration
XILINX INC100 citations98
US7071756B1Jul 4, 2006
Clock multiplexing system
XILINX INC20 citations93
US7882165B2Feb 1, 2011
Digital signal processing element having an arithmetic logic unit
XILINX INC25 citations92
US7870182B2Jan 11, 2011
Digital signal processing circuit having an adder circuit with carry-outs
XILINX INC21 citations92
US7394708B1Jul 1, 2008
Adjustable global tap voltage to improve memory cell yield
XILINX INC33 citations92
US7233532B2Jun 19, 2007
Reconfiguration port for dynamic reconfiguration-system monitor interface
XILINX INC26 citations92
US7129762B1Oct 31, 2006
Efficient implementation of a bypassable flip-flop with a clock enable
XILINX INC34 citations92
US7865542B2Jan 4, 2011
Digital signal processing block having a wide multiplexer
XILINX INC16 citations84
US7860915B2Dec 28, 2010
Digital signal processing circuit having a pattern circuit for determining termination conditions
XILINX INC11 citations84
US7853634B2Dec 14, 2010
Digital signal processing circuit having a SIMD circuit
XILINX INC10 citations84
US7853636B2Dec 14, 2010
Digital signal processing circuit having a pattern detector circuit for convergent rounding
XILINX INC10 citations84
US7853632B2Dec 14, 2010
Architectural floorplan for a digital signal processing circuit
XILINX INC12 citations84
US7849119B2Dec 7, 2010
Digital signal processing circuit having a pattern detector circuit
XILINX INC12 citations84
US7844653B2Nov 30, 2010
Digital signal processing circuit having a pre-adder circuit
XILINX INC11 citations84
US7840627B2Nov 23, 2010
Digital signal processing circuit having input register blocks
XILINX INC8 citations84
US7840630B2Nov 23, 2010
Arithmetic logic unit circuit
XILINX INC17 citations84
US7314174B1Jan 1, 2008
Method and system for configuring an integrated circuit
XILINX INC14 citations84
US7196940B1Mar 27, 2007
Method and apparatus for a multiplexed address line driver
XILINX INC14 citations84
US7129765B2Oct 31, 2006
Differential clock tree in an integrated circuit
XILINX INC13 citations84
US7126406B2Oct 24, 2006
Programmable logic device having an embedded differential clock tree
XILINX INC11 citations84
US7109750B2Sep 19, 2006
Reconfiguration port for dynamic reconfiguration-controller
XILINX INC17 citations84
US8001171B1Aug 16, 2011
Pipeline FFT architecture for a programmable device
XILINX INC16 citations82
US7759973B1Jul 20, 2010
Integrated circuit having embedded differential clock tree
XILINX INC6 citations74
US7518401B2Apr 14, 2009
Differential clock tree in an integrated circuit
XILINX INC7 citations74
US7414430B2Aug 19, 2008
Programmable logic device having an embedded differential clock tree
XILINX INC7 citations74
US7286382B1Oct 23, 2007
Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
XILINX INC7 citations74
US7142442B1Nov 28, 2006
Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testability
XILINX INC9 citations74
US7372299B2May 13, 2008
Differential clock tree in an integrated circuit
XILINX INC4 citations63