Inventor · disambiguated record
Jean-Jacques Pairault
Also filed as: PAIRAULT JEAN-JACQUES
6 granted patents·57 citations·filing 1990–2011
82Inventor score
Top patents by PatentIndex Score
6 records- 0170US8018736B2Card design with fully buffered memory modules and the use of a chip between two consecutive modulesBULL SAS·Filed 2007·Granted Sep 13, 2011·5 cites·13 claims
- 0266US8432707B2Card design with fully buffered memory modules and the use of a chip between two consecutive modulesPAIRAULT JEAN-JACQUES·Filed 2011·Granted Apr 30, 2013·3 cites·7 claims
- 0363US9218222B2Physical manager of synchronization barrier between multiple processesSOLINAS ANGELO·Filed 2009·Granted Dec 22, 2015·7 cites·15 claims
- 0460US5235687AMethod for replacing memory modules in a data processing system, and data processing system for performing the methodBULL SA·Filed 1990·Granted Aug 10, 1993·28 cites·29 claims
- 0558US7692929B2Interface connection device for connecting a mainboard to a memory card having two series of memory modulesBULL SAS·Filed 2006·Granted Apr 6, 2010·3 cites·26 claims
- 0631US6240491B1Process and system for switching between an update and invalidate mode for each cache blockBULL SA·Filed 1997·Granted May 29, 2001·11 cites·20 claims
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