Inventor

GSCHWIND MICHAEL KARL

US308 patents

⚠️ This page may combine multiple inventors who share the name “GSCHWIND MICHAEL KARL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GSCHWIND MICHAEL KARL

IBM

Linking a function with dual entry points

Table of contents pointer value save and restore placeholder positioning

SIMD datapath coupled to scalar/vector/address/conditional data register file with selective subpath scalar processing mode

Implementing instruction set architectures with non-contiguous register file specifiers

Method and apparatus for software-assisted thermal management for electronic systems

Executing optimized local entry points

Executing optimized local entry points and function call sites

Fingerprint-initiated trace extraction

Rewriting symbol address initialization sequences

Managing table of contents pointer value saves

Suppression of table of contents save actions

Hybrid tracking of transaction read and write sets

Dynamic predictor for coalescing memory transactions

Instruction to cancel outstanding cache prefetches

Transaction tracking within a microprocessor

Prefetching of discontiguous storage locations in anticipation of transactional execution

Using transactional execution for reliability and recovery of transient failures

Salvaging hardware transactions

Managing table of contents pointer value saves

Suppression of table of contents save actions

Dynamic predictor for coalescing memory transactions

Coalescing memory transactions

Compilation for a SIMD RISC processor

Implementing instruction set architectures with non-contiguous register file specifiers

Compiler optimizations for vector instructions

Logical partitioning and virtualization in a heterogeneous architecture

Method and apparatus for profiling computer program execution

Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system

System and method of execution of register pointer instructions ahead of instruction issues

Method and apparatus for creating and executing integrated executables in a heterogeneous architecture

Method and apparatus for setting breakpoints when debugging integrated executables in a heterogeneous architecture

Method and apparatus for enabling access to global data by a plurality of codes in an integrated executable for a heterogeneous architecture

Method and system for maintaining coherency in a multiprocessor system by broadcasting TLB invalidated entry instructions

Soft error handling in microprocessors

Hint instruction for managing transactional aborts in transactional memory computing environments

Hardware transaction transient conflict resolution

Latent modification instruction for transactional execution

Transactional memory operations with write-only atomicity

Transactional memory operations with read-only atomicity

Predicting the length of a transaction

Device, system and method for tracking and replacing lights with automated vehicles

Hybrid tracking of transaction read and write sets

Multi-section garbage collection system including multi-use source register

Collecting memory operand access characteristics during transactional execution

Enhancing reliability of transaction execution by using transaction digests

Dynamic releasing of cache lines

GSCHWIND MICHAEL KARL

Implementing instruction set architectures with non-contiguous register file specifiers

Implementing instruction set architectures with non-contiguous register file specifiers

EICHENBERGER ALEXANDRE E

Method and structure of using SIMD vector architectures to implement matrix multiplication

DAY MICHAEL NORMAN

System and method for speculative thread assist in a heterogeneous processing environment