Inventor

BALASUBRAMANIAN SURESH

US23 patents

⚠️ This page may combine multiple inventors who share the name “BALASUBRAMANIAN SURESH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BALASUBRAMANIAN SURESH

TEXAS INSTRUMENTS INC

Dual port memory unit using a single port memory core

Generating a lock signal indicating whether an output clock signal generated by a PLL is in lock with an input reference signal

Tracking circuit enabling quick/accurate retrieval of data stored in a memory array

High performance, area efficient direct bitline sensing circuit

Sense amplifier for a memory array

Low-power redundancy for non-volatile memory

Methods and apparatus to improve performance while reading a one-time-programmable memory

Methods and apparatus to improve performance while reading a one-time programmable memory

High speed differential rom

CAVIUM INC

Multiplexer flop

Frequency division clock alignment

Frequency division clock alignment using pattern selection

Multi-function delay locked loop

Clock distribution circuit with distributed delay locked loop

Scannable flop with a single storage element

Clock gated delay line based on setting value

APPLE INC

Hybrid pulse/master-slave data latch

Hybrid pulse/two-stage data latch

Hybrid pulse/two-stage data latch

Clock duty cycle correction

INTEL CORP

Deterministic operation of an input/output interface

LIN DAVID

Multi-function delay locked loop

BALASUBRAMANIAN SURESH

State machine for deskew delay locked loop