Inventor

LIN CHIH-YU

TW98 patents

⚠️ This page may combine multiple inventors who share the name “LIN CHIH-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN CHIH-YU

TAIWAN SEMICONDUCTOR MFG CO LTD

Static random access memory with a supplementary driver circuit and method of controlling the same

Method and system to balance ground bounce

Memory cell and method of manufacturing the same

Static random access memory with write assist circuit

SRAM cell word line structure with reduced RC effects

SRAM-based authentication circuit

Apparatus and method of three dimensional conductive lines

Memory device

Memory array circuit and method of manufacturing same

Method and system to balance ground bounce

Memory array circuit and method of manufacturing same

Four CPP wide memory cell with buried power grid, and method of fabricating same

Physically unclonable function (PUF) generation

Mixed threshold voltage memory array

Semiconductor memory with respective power voltages for memory cells

SRAM based authentication circuit

Memory cell

Memory circuit having resistive device coupled with supply voltage line

Apparatus and method of three dimensional conductive lines

Static random access memory and method of controlling the same

Method of writing to memory circuit using resistive device

Apparatus and method of three dimensional conductive lines

Memory circuit having resistive device coupled with supply voltage line

Memory device including a word line with portions with different sizes in different metal layers

Memory array circuit and method of manufacturing same

SRAM cell word line structure with reduced RC effects

Static random access memory with a supplementary driver circuit and method of controlling the same

SRAM cell word line structure with reduced RC effects

Static random access memory with a supplementary driver circuit and method of controlling the same

SRAM based authentication circuit

Semiconductor memory with respective power voltages for memory cells

Static random access memory with a supplementary driver circuit and method of controlling the same

SRAM cell word line structure with reduced RC effects

Wordline tracking for boosted-wordline timing scheme

Static random access memory with write assist circuit

Memory device including separate negative bit line

Memory device

Memory device having a negative voltage circuit

Memory devices with improved bit line loading

Four CPP wide memory cell with buried power grid, and method of fabricating same

Method and system to balance ground bounce

Memory array circuit and method of manufacturing same

TAIWAN SEMICONDUCTOR MFG

Memory device and method for writing therefor

Boosted read write word line

INST INFORMATION INDUSTRY

Methods and systems of dynamic channel allocation for access points in wireless networks

CHEN YEN-HUEI

Memory device and method for writing therefor

LIN CHIH-YU

Memory circuit and method of writing datum to memory circuit

IND TECH RES INST

Method for virtual local area network fail-over management, system therefor and apparatus therewith

SENSORTEK TECH CORP

Proximity sensor and proximity sensing method

SITRONIX TECHNOLOGY CORP

Proximity sensor and proximity sensing method