Inventor

LIAO HUNG-JEN

TW234 patents

⚠️ This page may combine multiple inventors who share the name “LIAO HUNG-JEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIAO HUNG-JEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Pre-colored methodology of multiple patterning

Memory macro and method of operating the same

Method of forming semiconductor device including distributed write driving arrangement

Voltage regulator with power rail tracking

Memory cell and method of manufacturing the same

Semiconductor device including distributed write driving arrangement and method of operating same

Memory computation circuit and method

Low voltage memory device

Semiconductor device including distributed write driving arrangement and method of operating same

Static random access memory with write assist circuit

Level shifter

Memory macro and method of operating the same

Memory device with strap cells

Configurable memory storage system

SRAM cell word line structure with reduced RC effects

Memory macro and method of operating the same

Memory device with strap cells

Static random access memory circuits

Memory macro and method of operating the same

Memory read stability enhancement with short segmented bit line architecture

SRAM cell for interleaved wordline scheme

Memory device with strap cells

Method of using a static random access memory

Memory devices with strap cells

Layout design for manufacturing a memory cell

Power line lowering for write assisted control scheme

Pre-colored methodology of multiple patterning

Method and apparatus for read assist to compensate for weak bit

TAIWAN SEMICONDUCTOR MFG

Multi-port memory cell

Word-line driver design for pseudo two-port memories

Three-transistor type DRAM with a refresh circuit

CMOS I/O circuit with 3.3 volt output and tolerance of 5 volt input

Memory having improved power design

Tracking circuit for a memory device

Static random access memory and method of using the same

SRAM cell array structure

Robust 8T SRAM cell

Circuit and method for an SRAM with two phase word line pulse

Read-preferred SRAM cell design

Word-line driver for memory devices

Multi-state electrical fuse

Circuits for improving read and write margins in multi-port SRAMS

LEE CHENG HUNG

Ultra-low leakage memory architecture

SRAM cells, memory circuits, systems, and fabrication methods thereof

LIN TZU-KUEI

Word line layout for semiconductor memory

Memory device having a clock skew generator

CHEN YEN-HUEI

Pre-colored methodology of multiple patterning

CHANG JONATHAN TSUNG-YUNG

Method and apparatus for read assist to compensate for weak bit

LIN CHIH-YU

Memory circuit and method of writing datum to memory circuit

CHEN JUNG-HSUAN

Layouts of POLY cut openings overlapping active regions