Inventor
WALDER DAVID S
US6 patents
Patents
6 patentsUS10268482B2Apr 23, 2019
Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction
IBM2 citations69
US11194578B2Dec 7, 2021
Fused overloaded register file read to enable 2-cycle move from condition register instruction in a microprocessor
IBM0 citations61
US11144364B2Oct 12, 2021
Supporting speculative microprocessor instruction execution
IBM1 citations60
US10776122B2Sep 15, 2020
Prioritization protocols of conditional branch instructions
IBM1 citations59
US11030018B2Jun 8, 2021
On-demand multi-tiered hang buster for SMT microprocessor
IBM0 citations49
US10282207B2May 7, 2019
Multi-slice processor issue of a dependent instruction in an issue queue based on issue of a producer instruction
IBM0 citations48