Inventor

Chen hong-yan

US47 patents

⚠️ This page may combine multiple inventors who share the name “Chen hong-yan”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

Chen hong-yan

SANDISK TECHNOLOGIES LLC

Method of reducing injection type of program disturb during program pre-charge in memory device

Reducing read disturb in two-tier memory device by modifying ramp up rate of word line voltages during channel discharge

Two-stage ramp up of word line voltages in memory device to suppress read disturb

Reducing disturbs with delayed ramp up of selected word line voltage after pre-charge during programming

Reducing hot electron injection type of read disturb during read recovery phase in 3D memory

Non-volatile memory with customized control of injection type of disturb during read operations

Mitigating hot electron program disturb

Maintaining channel pre-charge in program operation

Memory device with channel discharge before program-verify based on data state and sub-block position

Reducing program disturb by modifying word line voltages at interface in two-tier stack during programming

Reducing program disturb by modifying word line voltages at interface in two-tier stack after program-verify

Reducing injection type of read disturb in a cold read of a memory device

Reducing read disturb in two-tier memory device by modifying duration of channel discharge based on selected word line

Memory device with discharge voltage pulse to reduce injection type of program disturb

Memory device with vpass step to reduce hot carrier injection type of program disturb

Non-volatile memory with customized control of injection type of disturb during program verify for improved program performance

Reducing hot electron injection type of read disturb in 3D non-volatile memory for edge word lines

Program-verify of select gate transistor with doped channel in NAND string

Method of reducing injection type of program disturb during program pre-charge in memory device

Reducing neighbor word line interference in a two-tier memory device by modifying word line programming order

Memory device with charge isolation to reduce injection type of program disturb

Reducing hot electron injection type of read disturb in 3D memory device during signal switching transients

Reducing hot electron injection type of read disturb in 3D memory device having connected source-end select gates

Reducing charge loss in data memory cell adjacent to dummy memory cell

MICRON TECHNOLOGY INC

Short program verify recovery with reduced programming disturbance in a memory sub-system

Managing sub-block erase operations in a memory sub-system

Pre-boosting scheme during a program operation in a memory sub-system

Managing sub-block erase operations in a memory sub-system

Short program verify recovery with reduced programming disturbance in a memory sub-system

Short program verify recovery with reduced programming disturbance in a memory sub-system

Pre-boosting scheme during a program operation in a memory sub-system

Managing sub-block erase operations in a memory sub-system

Program scheme for edge data wordlines in a memory device

Corrective program verify operation with improved read window budget retention

Unselected sub-block source line and bit line pre-charging to reduce read disturb

Erase operation with electron injection for reduction of cell-to-cell interference in a memory sub-system

Memory devices with program verify levels based on compensation values

SANDISK TECHNOLOGIES INC

Reducing hot electron injection type of read disturb in 3D non-volatile memory for edge word lines

Method of reducing hot electron injection type of read disturb in dummy memory cells

Reducing hot electron injection type of read disturb in 3D non-volatile memory

Method of reducing hot electron injection type of read disturb in memory

Controlling pass voltages to minimize program disturb in charge-trapping memory

Method of reducing hot electron injection type of read disturb in dummy memory cells

Read with look-back combined with programming with asymmetric boosting in memory

Weak erase after programming to improve data retention in charge-trapping memory

Efficient reprogramming method for tightening a threshold voltage distribution in a memory device

PURDUE RESEARCH FOUNDATION

Graphene-based frequency tripler