Inventor
HUTTER MICHAEL
US19 patents
Patents
19 patentsUS10333699B1Jun 25, 2019
Generating a pseudorandom number based on a portion of shares used in a cryptographic operation
CRYPTOGRAPHY RES INC5 citations83
US10871947B2Dec 22, 2020
Converting a boolean masked value to an arithmetically masked value for cryptographic operations
CRYPTOGRAPHY RES INC6 citations82
US11018849B2May 25, 2021
Hardware masked substitution box for the data encryption standard
CRYPTOGRAPHY RES INC2 citations71
US10911221B2Feb 2, 2021
Memory optimization for nested hash operations
CRYPTOGRAPHY RES INC2 citations71
US10454670B2Oct 22, 2019
Memory optimization for nested hash operations
CRYPTOGRAPHY RES INC3 citations71
US12307000B2May 20, 2025
Share domain arrangements for masked hardware implementations
CRYPTOGRAPHY RES INC0 citations62
US11863670B2Jan 2, 2024
Efficient side-channel-attack-resistant memory encryptor based on key update
CRYPTOGRAPHY RES INC0 citations61
US11620109B2Apr 4, 2023
Converting a boolean masked value to an arithmetically masked value for cryptographic operations
CRYPTOGRAPHY RES INC0 citations61
US11539509B2Dec 27, 2022
Memory optimization for nested hash operations
CRYPTOGRAPHY RES INC0 citations61
US11353504B2Jun 7, 2022
Freeze logic
CRYPTOGRAPHY RES INC0 citations61
US11101981B2Aug 24, 2021
Generating a pseudorandom number based on a portion of shares used in a cryptographic operation
CRYPTOGRAPHY RES INC0 citations61
US10461925B2Oct 29, 2019
Hardware masked substitution box for the data encryption standard
CRYPTOGRAPHY RES INC1 citations61
US12316742B2May 27, 2025
Hardware circuit to perform round computations of ARX-based stream ciphers
CRYPTOGRAPHY RES INC1 citations56
US11914870B2Feb 27, 2024
Side-channel-attack-resistant memory access on embedded central processing units
CRYPTOGRAPHY RES INC0 citations54
US12554894B2Feb 17, 2026
Low-latency multi-domain masking
CRYPTOGRAPHY RES INC0 citations52
US10712385B2Jul 14, 2020
Freeze logic
CRYPTOGRAPHY RES INC0 citations51
US12021969B2Jun 25, 2024
Functions with a pre-charge operation and an evaluation operation
CRYPTOGRAPHY RES INC0 citations50
US11983280B2May 14, 2024
Protection of cryptographic operations by intermediate randomization
CRYPTOGRAPHY RES INC0 citations50
US11822704B2Nov 21, 2023
Constant time secure arithmetic-to-Boolean mask conversion
CRYPTOGRAPHY RES INC0 citations50