Inventor
TRAN GIAP H
US19 patents
⚠️ This page may combine multiple inventors who share the name “TRAN GIAP H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VANTIS CORP
14 patentsUS6275064B1Aug 14, 2001
Symmetrical, extended and fast direct connections between variable grain blocks in FPGA integrated circuits
VANTIS CORP218 citations99
US6130551AOct 10, 2000
Synthesis-friendly FPGA architecture with variable length and variable timing interconnect
VANTIS CORP138 citations99
US6380759B1Apr 30, 2002
Variable grain architecture for FPGA integrated circuits
VANTIS CORP64 citations96
US6249144B1Jun 19, 2001
Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources
VANTIS CORP67 citations96
US6216257B1Apr 10, 2001
FPGA device and method that includes a variable grain function architecture for implementing configuration logic blocks and a complimentary variable length interconnect architecture for providing configurable routing between configuration logic blocks
VANTIS CORP82 citations96
US6154051ANov 28, 2000
Tileable and compact layout for super variable grain blocks within FPGA device
VANTIS CORP75 citations96
US6100715AAug 8, 2000
Methods for configuring FPGA's having variable grain blocks and logic for providing time-shared access to interconnect resources
VANTIS CORP46 citations92
US5990702ANov 23, 1999
Flexible direct connections between input/output blocks (IOBs) and variable grain blocks (VGBs) in FPGA integrated circuits
VANTIS CORP25 citations92
US5982193ANov 9, 1999
Input/output block (IOB) connections to MaxL lines, nor lines and dendrites in FPGA integrated circuits
VANTIS CORP18 citations81
US6292930B1Sep 18, 2001
Methods for configuring FPGA's having variable grain blocks and shared logic for providing time-shared access to interconnect resources
VANTIS CORP7 citations74
US6204686B1Mar 20, 2001
Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources
VANTIS CORP10 citations74
US6150842ANov 21, 2000
Variable grain architecture for FPGA integrated circuits
VANTIS CORP6 citations74
US6107823AAug 22, 2000
Programmable control multiplexing for input/output blocks (IOBs) in FPGA integrated circuits
VANTIS CORP9 citations74
US6124730ASep 26, 2000
Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources
VANTIS CORP4 citations63
LATTICE SEMICONDUCTOR CORP
4 patentsUS6097212AAug 1, 2000
Variable grain architecture for FPGA integrated circuits
LATTICE SEMICONDUCTOR CORP105 citations99
US6590415B2Jul 8, 2003
Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources
LATTICE SEMICONDUCTOR CORP62 citations96
US6621298B2Sep 16, 2003
Variable grain architecture for FPGA integrated circuits
LATTICE SEMICONDUCTOR CORP25 citations92
US6526558B2Feb 25, 2003
Methods for configuring FPGA's having variable grain blocks and shared logic for providing symmetric routing of result output to differently-directed and tristateable interconnect resources
LATTICE SEMICONDUCTOR CORP14 citations84