Inventor

BARNETTE JAMES D

US18 patents

⚠️ This page may combine multiple inventors who share the name “BARNETTE JAMES D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BARNETTE JAMES D

SILICON LAB INC

Use of a virtual clock in a PLL to maintain a closed loop system

Synchronization of clock signals generated using output dividers

Spur and quantization noise cancellation for PLLS with non-linear phase detection

Fractional divider with error correction

Reference clock frequency change handling in a phase-locked loop

Gradual frequency transition with a frequency step

Locking a PLL to the nearest edge of the input clock when the input clock is divided down before use in the PLL

Accurate and reliable digital PLL lock indicator

Method for generation of independent clock signals from the same oscillator

Synchronization of clock signals generated using output dividers

LUCENT TECHNOLOGIES INC

Interpolator, a resampler employing the interpolator and method of interpolating a signal associated therewith

Resampler for a bit pump and method of resampling a signal associated therewith

CIRRUS LOGIC INC

Circuits, system, and methods for processing multiple data streams

BARNETTE JAMES D

Method for switching master/slave timing in a 1000BASE-T link without traffic disruption

SKYWORKS SOLUTIONS INC

Using time-to-digital converters to delay signals with high accuracy and large range

ALCATEL LUCENT USA INC

Resampler for a bit pump and method of resampling a signal associated therewith

MICROSEMI STORAGE SOLUTIONS INC

Method for switching master/slave timing in a 1000Base-T link without traffic disruption

ROCK JASON C

System and method for squelching a recovered clock in an ethernet network