Inventor

D ARRIGO SEBASTIANO

US32 patents

⚠️ This page may combine multiple inventors who share the name “D ARRIGO SEBASTIANO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

D ARRIGO SEBASTIANO

TEXAS INSTRUMENTS INC

Negative-voltage charge pump with feedback control

EEPROM memory cell and driving circuitry

EEPROM memory cell having improved breakdown characteristics and driving circuitry therefor

Power-up control circuit including a comparator, Schmitt trigger, and latch

Flash EEPROM array with P-tank insulated from substrate by deep N-tank

Method for programming EEPROM memory arrays

Programming of an electrically-erasable, electrically-programmable, read-only memory array

Method of manufacturing an EEPROM with trench-isolated bitlines

Level-shifter circuit for integrated circuits

Nonvolatile memory cell with field-plate switch

EEPROM with trench-isolated bitlines

Electrically-erasable, electrically-programmable read-only memory cell

EEPROM memory cell and driving circuitry

Process for making a lateral bipolar transistor in a standard CSAG process

Integrated circuit wireless tagging

Wordline driver circuit for EEPROM memory cell

Driving circuitry for EEPROM memory cell

Method and circuit for trimming the frequency of an oscillator

Flash EEPROM array with P-tank insulated from substrate by deep N-tank

Electrically programmable fuse circuit for an integrated-circuit chip

Fabricating an electrically-erasable, electrically-programmable read-only memory having a tunnel window insulator and thick oxide isolation between wordlines

Method of making electrically programmable and erasable memory cells with field plate conductor defined drain regions

Method of making a nonvolatile memory cell with field-plate switch

Electrically-erasable, electrically-programmable read-only memory

Method of forming a field plate in a high voltage array

High voltage pulse detector with controllable current consumption

Integrated circuit oscillator

Crosspoint memory

Integrated circuit wireless tagging

Method of making electrically-erasable, electrically-programmable read-only memory cell having a tunnel window insulator and forming implanted regions for isolation between wordlines

ATES COMPONENTI ELETTRON

Protective device for a power element of an integrated circuit

CSELT CENTRO STUDI LAB TELECOM

Transmit/receive network for telephone-subscriber station