Inventor
CHEON YONGSEOK
US3 patents
Patents
3 patentsUS7546567B2Jun 9, 2009
Method and apparatus for generating a variation-tolerant clock-tree for an integrated circuit chip
SYNOPSYS INC29 citations89
US7260802B2Aug 21, 2007
Method and apparatus for partitioning an integrated circuit chip
SYNOPSYS INC11 citations81
US7257782B2Aug 14, 2007
Method and apparatus for reducing power consumption in an integrated circuit chip
SYNOPSYS INC16 citations77