P

Inventor

RESHOTKO MIRIAM

US15 patents

Patents

15 patents
US7700975B2Apr 20, 2010

Schottky barrier metal-germanium contact in metal-germanium-metal photodetectors

INTEL CORP26 citations92
US11444024B2Sep 13, 2022

Subtractively patterned interconnect structures for integrated circuits

INTEL CORP10 citations84
US12027458B2Jul 2, 2024

Subtractively patterned interconnect structures for integrated circuits

INTEL CORP2 citations71
US11264317B2Mar 1, 2022

Antifuse memory arrays with antifuse elements at the back-end-of-line (BEOL)

INTEL CORP2 citations67
US11894270B2Feb 6, 2024

Grating replication using helmets and topographically-selective deposition

INTEL CORP0 citations62
US11843054B2Dec 12, 2023

Vertical architecture of thin film transistors

INTEL CORP1 citations62
US11527656B2Dec 13, 2022

Contact electrodes for vertical thin-film transistors

INTEL CORP1 citations62
US11335598B2May 17, 2022

Grating replication using helmets and topographically-selective deposition

INTEL CORP0 citations62
US7948010B2May 24, 2011

Dual seed semiconductor photodetectors

INTEL CORP4 citations62
US7553687B2Jun 30, 2009

Dual seed semiconductor photodetectors

INTEL CORP4 citations62
US12482744B2Nov 25, 2025

Subtractively patterned interconnect structures for integrated circuits

INTEL CORP0 citations61
US11664305B2May 30, 2023

Staggered lines for interconnect performance improvement and processes for forming such

INTEL CORP0 citations61
US12500162B2Dec 16, 2025

Staggered vertically spaced integrated circuit line metallization with differential vias and metal-selective deposition

INTEL CORP0 citations50
US12598977B2Apr 7, 2026

Fill of vias in single and dual damascene structures using self-assembled monolayer

INTEL CORP0 citations49
US12009433B2Jun 11, 2024

Multi-dielectric gate stack for crystalline thin film transistors

INTEL CORP0 citations49