Inventor
ROBINSON THEODORE S
US5 patents
Patents
5 patentsUS5095424AMar 10, 1992
Computer system architecture implementing split instruction and operand cache line-pair-state management
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Resource contention deadlock detection and prevention
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Apparatus for buffer control bypass
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US5168560ADec 1, 1992
Microprocessor system private split cache tag stores with the system tag store having a different validity bit for the same data line
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US4881163ANov 14, 1989
Computer system architecture employing cache data line move-out queue buffer
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