Inventor

MAY ROBERT ALAN

US43 patents

⚠️ This page may combine multiple inventors who share the name “MAY ROBERT ALAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MAY ROBERT ALAN

INTEL CORP

Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same

Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same

Microelectronic component having molded regions with through-mold vias

Electromigration resistant and profile consistent contact arrays

Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate

Microelectronic device with embedded die substrate on interposer

RFIC having coaxial interconnect and molded layer

Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling same

Metal protected fan-out cavity

Microelectronic component having molded regions with through-mold vias

Device and method of very high density routing used with embedded multi-die interconnect bridge

Microelectronic component having molded regions with through-mold vias

Electromigration resistant and profile consistent contact arrays

Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling

Package substrates with integral devices

Embedded die architecture and method of making

Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate

Embedded multi-die interconnect bridge having a molded region with through-mold vias

Faraday rotator interconnect as a through-via configuration in a patch architecture

Microelectronic device with embedded die substrate on interposer

Microelectronic device with embedded die substrate on interposer

Patch accommodating embedded dies having different thicknesses

Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling same

Package substrate with high-density interconnect layer having pillar and via connections for fan out scaling

Semiconductor package having a coaxial first layer interconnect

Pseudo-stripline using double solder-resist structure

Package substrate having copper alloy sputter seed layer and high density interconnects

Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate

Device and method of very high density routing used with embedded multi-die interconnect bridge

Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate

Die interconnect substrate, an electrical device and a method for forming a die interconnect substrate

Microelectronic component having molded regions with through-mold vias

Device and method of very high density routing used with embedded multi-die interconnect bridge

Embedded multi-die interconnect bridge having a substrate with conductive pathways and a molded material region with through-mold vias

Semiconductor device including silane based adhesion promoter and method of making

Package substrate having polymer-derived ceramic core

Plasma etching of solder resist openings

Electromigration resistant and profile consistent contact arrays

Microelectronic structures including bridges

Substrate integrated waveguide

Multi-die microelectronic device with integral heat spreader

TAHOE RES LTD

Electromigration resistant and profile consistent contact arrays

BOYAPATI SRI RANGA SAI

Package with passivated interconnects