P

Inventor

JEN WEI-LUN KANE

US14 patents

Patents

14 patents
US9236366B2Jan 12, 2016

High density organic bridge device and method

INTEL CORP14 citations88
US9548264B2Jan 17, 2017

High density organic bridge device and method

INTEL CORP10 citations83
US12014989B2Jun 18, 2024

Device and method of very high density routing used with embedded multi-die interconnect bridge

INTEL CORP1 citations72
US10672713B2Jun 2, 2020

High density organic bridge device and method

INTEL CORP1 citations72
US10624213B1Apr 14, 2020

Asymmetric electronic substrate and method of manufacture

INTEL CORP5 citations72
US10103105B2Oct 16, 2018

High density organic bridge device and method

INTEL CORP2 citations72
US9603247B2Mar 21, 2017

Electronic package with narrow-factor via including finish layer

INTEL CORP3 citations72
US10978399B2Apr 13, 2021

Die interconnect substrate, an electrical device, and a method for forming a die interconnect substrate

INTEL CORP2 citations71
US12002762B2Jun 4, 2024

High density organic bridge device and method

INTEL CORP0 citations62
US10980129B2Apr 13, 2021

Asymmetric electronic substrate and method of manufacture

INTEL CORP0 citations62
US12040276B2Jul 16, 2024

Device and method of very high density routing used with embedded multi-die interconnect bridge

INTEL CORP0 citations61
US11508662B2Nov 22, 2022

Device and method of very high density routing used with embedded multi-die interconnect bridge

INTEL CORP0 citations61
US10916486B2Feb 9, 2021

Semiconductor device including silane based adhesion promoter and method of making

INTEL CORP0 citations59
US9788416B2Oct 10, 2017

Multilayer substrate for semiconductor packaging

INTEL CORP1 citations47