Inventor

PUTHOOR SOORAJ

US32 patents

Patents

32 patents

US11231931B1Jan 25, 2022

Mechanism for mitigating information leak via cache side channels during speculative execution

ADVANCED MICRO DEVICES INC12 citations85

US9898287B2Feb 20, 2018

Dynamic wavefront creation for processing units using a hybrid compactor

ADVANCED MICRO DEVICES INC3 citations73

US10963299B2Mar 30, 2021

Hardware accelerated dynamic work creation on a graphics processing unit

ADVANCED MICRO DEVICES INC3 citations72

US10713059B2Jul 14, 2020

Heterogeneous graphics processing unit for scheduling thread groups for execution on variable width SIMD units

ADVANCED MICRO DEVICES INC2 citations72

US10409610B2Sep 10, 2019

Method and apparatus for inter-lane thread migration

ADVANCED MICRO DEVICES INC2 citations72

US12204774B2Jan 21, 2025

Allocation of resources when processing at memory level through memory request scheduling

ADVANCED MICRO DEVICES INC1 citations63

US12399719B2Aug 26, 2025

Predicting a context portion to move between a context buffer and registers based on context portions previously used by at least one other thread

ADVANCED MICRO DEVICES INC0 citations51

US10324650B2Jun 18, 2019

Scoped persistence barriers for non-volatile memories

ADVANCED MICRO DEVICES INC0 citations49

PUTHOOR SOORAJ

Patents

Mechanism for mitigating information leak via cache side channels during speculative execution

Dynamic wavefront creation for processing units using a hybrid compactor

Hardware accelerated dynamic work creation on a graphics processing unit

Heterogeneous graphics processing unit for scheduling thread groups for execution on variable width SIMD units

Method and apparatus for inter-lane thread migration

Allocation of resources when processing at memory level through memory request scheduling

Resource access control

System performance management using prioritized compute units

Implementing heterogeneous wavefronts on a graphics processing unit (GPU)

System performance management using prioritized compute units

Dynamic kernel memory space allocation

Scheduling processing-in-memory transactions

Process isolation for a processor-in-memory (“PIM”) device

Garbage collecting wavefront

Hardware accelerated dynamic work creation on a graphics processing unit

Virtual partitioning a processor-in-memory (“PIM”)

Process isolation for a processor-in-memory (“PIM”) device

Partition and isolation of a processing-in-memory (PIM) device

Dynamic kernel memory space allocation

Hardware accelerated dynamic work creation on a graphics processing unit

Approach for providing indirect addressing in memory modules

FPGA-based programmable data analysis and compression front end for GPU

Scoped persistence barriers for non-volatile memories

Memory request priority assignment techniques for parallel processors

Continuation analysis tasks for GPU task scheduling

Continuation analysis tasks for GPU task scheduling

Multi-kernel wavefront scheduler

Hardware assisted fine-grained data movement

Hardware assisted fine-grained data movement

Managing cache coherence using information in a page table

Predicting a context portion to move between a context buffer and registers based on context portions previously used by at least one other thread

Scoped persistence barriers for non-volatile memories