Inventor

GIDUTURI HARI

US48 patents

⚠️ This page may combine multiple inventors who share the name “GIDUTURI HARI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GIDUTURI HARI

MICRON TECHNOLOGY INC

Apparatuses and methods for current limitation in threshold switching memories

Ramp-based biasing in a memory device

Apparatuses and methods for current limitation in threshold switching memories

Apparatuses and methods for current limitation in threshold switching memories

Pre-decoder circuitry

Varying-polarity read operations for polarity-written memory cells

Memory cell programming that cancels threshold voltage drift

Memory cycling tracking for threshold voltage variation systems and methods

Apparatuses and methods for current limitation in threshold switching memories

Systems and methods involving charge pumps coupled with external pump capacitors and other circuitry

Tuned datapath in stacked memory device

Varying-polarity read operations for polarity-written memory cells

Decoder architecture for memory device

Varying-polarity read operations for polarity-written memory cells

Decoder architecture for memory device

Memory die stack chip ID-based command structure

Standby exit for memory die stack

Divided clock transmission in a three-dimensional stacked memory device

Memory die stack chip id-based command structure

Memory cycling tracking for threshold voltage variation systems and methods

Memory cell programming that cancels threshold voltage drift

Boost-assisted memory cell selection in a memory array

Ramp-based biasing and adjusting of access line voltage in a memory device

Power management for memory device

Multi-command memory accesses

Threshold voltage drift tracking systems and methods

Electrical distance-based remapping in a memory device

Power management for memory device

Boosted high-speed level shifter

Boosted high-speed level shifter

Pre-decoder circuitry

Voltage drivers with reduced power consumption during polarity transition

Voltage drivers with reduced power consumption during polarity transition

Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages

Memory device architecture using multiple physical cells per bit to improve read margin and to alleviate the need for managing demarcation read voltages

Passive compensation for electrical distance

Passive compensation for electrical distance

Intra-package memory die communication structures

Register operation in memory devices

INTEL CORP

Providing current for phase change memories

Analog temperature measurement apparatus and method

Step voltage generation

Voltage reference apparatus, method, and system

Constant current and voltage method and apparatus

Dynamic cascoding technique for operational amplifiers

Dynamic cascoding technique for operational amplifiers

Two transistor wordline decoder output driver

ABDULLA MOSTAFA NAGUIB

Wireless interface to program phase-change memories