Inventor
ROY RONNEN ANDREW
US21 patents
Patents
21 patentsUS5796166AAug 18, 1998
Tasin oxygen diffusion barrier in multilayer structures
IBM122 citations98
US6555880B2Apr 29, 2003
Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
IBM54 citations96
US5776823AJul 7, 1998
Tasin oxygen diffusion barrier in multilayer structures
IBM67 citations96
US6503833B1Jan 7, 2003
Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby
IBM83 citations95
US6440851B1Aug 27, 2002
Method and structure for controlling the interface roughness of cobalt disilicide
IBM57 citations95
US5828131AOct 27, 1998
Low temperature formation of low resistivity titanium silicide
IBM60 citations94
US6987050B2Jan 17, 2006
Self-aligned silicide (salicide) process for low resistivity contacts to thin film silicon-on-insulator and bulk MOSFETS and for shallow junctions
IBM21 citations92
US6753606B2Jun 22, 2004
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
IBM13 citations92
US6727135B2Apr 27, 2004
All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS
IBM16 citations92
US6716708B2Apr 6, 2004
Self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature and structure formed thereby
IBM20 citations92
US6614079B2Sep 2, 2003
All-in-one disposable/permanent spacer elevated source/drain, self-aligned silicide CMOS
IBM25 citations92
US6410430B1Jun 25, 2002
Enhanced ultra-shallow junctions in CMOS using high temperature silicide process
IBM31 citations92
US6331486B1Dec 18, 2001
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
IBM21 citations92
US6316123B1Nov 13, 2001
Microwave annealing
IBM15 citations92
US6051283AApr 18, 2000
Microwave annealing
IBM22 citations92
US6440808B1Aug 27, 2002
Damascene-gate process for the fabrication of MOSFET devices with minimum poly-gate depletion, silicided source and drain junctions, and low sheet resistance gate-poly
IBM48 citations91
US6413859B1Jul 2, 2002
Method and structure for retarding high temperature agglomeration of silicides using alloys
IBM26 citations91
US7081676B2Jul 25, 2006
Structure for controlling the interface roughness of cobalt disilicide
IBM5 citations73
US6187679B1Feb 13, 2001
Low temperature formation of low resistivity titanium silicide
IBM9 citations72
US7102234B2Sep 5, 2006
Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
IBM3 citations63
US6809030B2Oct 26, 2004
Method and structure for controlling the interface roughness of cobalt disilicide
IBM2 citations62