Inventor

YU QICHENG

US8 patents

⚠️ This page may combine multiple inventors who share the name “YU QICHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CIRRUS LOGIC INC

3 patents

US6445330B1Sep 3, 2002

Capacitively coupled references for isolated analog-to-digital converter systems

CIRRUS LOGIC INC19 citations92

US6002355ADec 14, 1999

Synchronously pumped substrate analog-to-digital converter (ADC) system and methods

CIRRUS LOGIC INC27 citations91

US6377198B1Apr 23, 2002

Definition of physical level of a logic output by a logic input

CIRRUS LOGIC INC6 citations57

YU QICHENG

2 patents

US8207766B2Jun 26, 2012

Method and apparatus for quantization noise reduction in fractional-N PLLs

YU QICHENG14 citations79

US8179163B2May 15, 2012

Method and apparatus for charge pump linearization in fractional-N PLLs

YU QICHENG2 citations58

SEETHAMRAJU SRISAI R

1 patent

US8532243B2Sep 10, 2013

Digital hold in a phase-locked loop

SEETHAMRAJU SRISAI R7 citations77

ROUT SAROJ

1 patent

US9699534B1Jul 4, 2017

Time-domain multiplexed signal processing block and method for use with multiple MEMS devices

ROUT SAROJ1 citations43

PANASONIC CORP

1 patent

US9939290B1Apr 10, 2018

Method for calibration of a system with time-multiplexed sensors

PANASONIC CORP0 citations33