Inventor
HASELHORST KENT HAROLD
US26 patents
⚠️ This page may combine multiple inventors who share the name “HASELHORST KENT HAROLD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
24 patentsUS6557069B1Apr 29, 2003
Processor-memory bus architecture for supporting multiple processors
IBM169 citations99
US6526469B1Feb 25, 2003
Bus architecture employing varying width uni-directional command bus
IBM198 citations99
US6513091B1Jan 28, 2003
Data routing using status-response signals
IBM167 citations98
US6247100B1Jun 12, 2001
Method and system for transmitting address commands in a multiprocessor system
IBM120 citations98
US6895482B1May 17, 2005
Reordering and flushing commands in a computer memory subsystem
IBM79 citations97
US5812817ASep 22, 1998
Compression architecture for system memory application
IBM163 citations97
US5710909AJan 20, 1998
Data compression utilization method and apparatus for computer main store
IBM72 citations96
US6628662B1Sep 30, 2003
Method and system for multilevel arbitration in a non-blocking crossbar switch
IBM52 citations92
US6505306B1Jan 7, 2003
Redundant bit steering mechanism with delayed switchover of fetch operations during redundant device initialization
IBM31 citations92
US7287103B2Oct 23, 2007
Method and apparatus for generating a mask value and command for extreme data rate memories utilizing error correction codes
IBM15 citations84
US7840744B2Nov 23, 2010
Rank select operation between an XIO interface and a double data rate interface
IBM8 citations83
US6188627B1Feb 13, 2001
Method and system for improving DRAM subsystem performance using burst refresh control
IBM11 citations73
US6532185B2Mar 11, 2003
Distribution of bank accesses in a multiple bank DRAM used as a data buffer
IBM8 citations72
US7752379B2Jul 6, 2010
Managing write-to-read turnarounds in an early read after write memory system
IBM1 citations62
US7380052B2May 27, 2008
Reuse of functional data buffers for pattern buffers in XDR DRAM
IBM4 citations62
US7272692B2Sep 18, 2007
Arbitration scheme for memory command selectors
IBM6 citations61
US6523080B1Feb 18, 2003
Shared bus non-sequential data ordering method and apparatus
IBM2 citations61
US7925823B2Apr 12, 2011
Reuse of functional data buffers for pattern buffers in XDR DRAM
IBM0 citations52
US7506081B2Mar 17, 2009
System and method of maintaining high bandwidth requirement of a data pipe from low bandwidth memories
IBM0 citations52
US7660908B2Feb 9, 2010
Implementing virtual packet storage via packet work area
IBM1 citations51
US7487318B2Feb 3, 2009
Managing write-to-read turnarounds in an early read after write memory system
IBM0 citations51
US7321950B2Jan 22, 2008
Method and apparatus for managing write-to-read turnarounds in an early read after write memory system
IBM0 citations51
US5748919AMay 5, 1998
Shared bus non-sequential data ordering method and apparatus
IBM1 citations51
US7617332B2Nov 10, 2009
Method and apparatus for implementing packet command instructions for network processing
IBM0 citations41