Inventor

LU SZU-WEI

TW308 patents

⚠️ This page may combine multiple inventors who share the name “LU SZU-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LU SZU-WEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Package structure and method

Integrated circuit package and method

Package structures and methods of forming the same

Package structures and methods of forming the same

Integrated circuit package and method of forming same

Package structures and methods of forming the same

Stacking of multiple dies for forming three dimensional integrated circuit (3DIC) structure

Integrated fan-out packages and methods of forming the same

Solution for reducing poor contact in info packages

Structure and approach to prevent thin wafer crack

Semiconductor device structure comprising a plurality of metal oxide fibers and method for forming the same

Plurality of stacked pillar portions on a semiconductor structure

Adhesive and thermal interface material on a plurality of dies covered by a lid

Package structures and methods of forming the same

Semiconductor structure having a dielectric layer edge covering circuit carrier

Semiconductor packages and forming method thereof

Package and method of manufacturing the same

Adhesive and thermal interface material on a plurality of dies covered by a lid

Dummy die placement without backside chipping

Giga interposer integration through chip-on-wafer-on-substrate

Package structure including a first die and a second die and a bridge die and method of forming the package structure

Package structure and manufacturing method thereof

Plurality of stacked pillar portions on a semiconductor structure

Underfill structure for semiconductor packages and methods of forming the same

Package structure and method

Package of integrated circuits having a light-to-heat-conversion coating material

Semiconductor package having thermal conductive pattern surrounding the semiconductor die

Sawing underfill in packaging processes

Integrated circuit package and method of forming same

Package structures and methods of forming the same

Semiconductor package and manufacturing method thereof

TAIWAN SEMICONDUCTOR MFG

Reducing cracking of high-lead or lead-free bumps by matching sizes of contact pads and bump pads

Electromagnetic shielding using through-silicon vias

Die-on-interposer assembly with dam structure and method of manufacturing the same

Integrated circuit having stress tuning layer

Stratified underfill in an IC package

Method of cutting integrated circuit chips from wafer by ablating with laser and cutting with saw blade

Silicon-based thin substrate and packaging schemes

IND TECH RES INST

Method for forming fine-pitched solder bumps

Integrated process for I/O redistribution and passive components fabrication and devices formed

Method for forming wafer level package

Method for forming solder bumps on flip chips and devices formed

Method for forming solder bumps of improved height and devices formed

Wafer level package incorporating elastomeric pads in dummy plugs

HUNG JUI-PIN

Packaging methods and structures using a die attach film

LIN JING-CHENG

Packages including active dies and dummy dies and methods for forming the same

LU SZU WEI

Sawing underfill in packaging processes

WANG CHUNG YU

Apparatus and methods for molding die on wafer interposers

WU CHIH-WEI

Assembly method for three dimensional integrated circuit

IND TECHNOLOGIES RES INST

Method for forming a wafer level package incorporating a multiplicity of elastomeric blocks and package formed