Inventor
DODDI RAVINDRANATH
IN17 patents
Patents
17 patentsUS12164448B2Dec 10, 2024
Mechanism to reduce exit latency for deeper power saving modes L2 in PCIe
QUALCOMM INC2 citations71
US12079061B2Sep 3, 2024
Power management for peripheral component interconnect
QUALCOMM INC1 citations60
US12153527B2Nov 26, 2024
Data rate increase for faulty lane recovery in multiple lane data links
QUALCOMM INC0 citations59
US12373359B2Jul 29, 2025
Mechanism to enhance PCIe generation switching
QUALCOMM INC0 citations58
US12430199B2Sep 30, 2025
Flow control between peripheral component interconnect express devices
QUALCOMM INC0 citations56
US12314204B2May 27, 2025
Single clock lane operation for a main band of a die-to-die connection
QUALCOMM INC0 citations56
US12579017B2Mar 17, 2026
Apparatus and methods for securing integrity and data encryption link sessions within die interconnect architectures
QUALCOMM INC0 citations53
US12572433B2Mar 10, 2026
Dynamically reconfigured redundant lanes in a communication interface circuit between chiplets to increase redundancy when the probability of failure favors a particular communication direction
QUALCOMM INC0 citations50
US11934335B2Mar 19, 2024
Power management for peripheral component interconnect
QUALCOMM INC0 citations50
US12399853B2Aug 26, 2025
Mechanism to improve link initialization time
QUALCOMM INC0 citations49
US12019577B2Jun 25, 2024
Latency reduction for link speed switching in multiple lane data links
QUALCOMM INC0 citations49
US12430280B2Sep 30, 2025
Mechanism to improve the reliability of sideband in chiplets
QUALCOMM INC0 citations48
US12423252B2Sep 23, 2025
Systems and methods for reducing latency and improving performance in a peripheral component interconnect express (PCIe) system
QUALCOMM INC0 citations48
US12417196B2Sep 16, 2025
Systems and methods for reducing latency and power consumption in a peripheral component interconnect express (PCIe) system
QUALCOMM INC0 citations48
US12499077B2Dec 16, 2025
Variable link width in two directions for main band chip module connection
QUALCOMM INC0 citations46
US12386382B2Aug 12, 2025
Reduced training for main band chip module interconnection clock lines
QUALCOMM INC0 citations46
US12380047B2Aug 5, 2025
Expanded data link width for main band chip module connection in alternate modes
QUALCOMM INC0 citations46