Inventor
V UMAMAHESHWARAN
IN7 patents
Patents
7 patentsUS12314204B2May 27, 2025
Single clock lane operation for a main band of a die-to-die connection
QUALCOMM INC0 citations56
US12579017B2Mar 17, 2026
Apparatus and methods for securing integrity and data encryption link sessions within die interconnect architectures
QUALCOMM INC0 citations53
US12399853B2Aug 26, 2025
Mechanism to improve link initialization time
QUALCOMM INC0 citations49
US12430280B2Sep 30, 2025
Mechanism to improve the reliability of sideband in chiplets
QUALCOMM INC0 citations48
US12499077B2Dec 16, 2025
Variable link width in two directions for main band chip module connection
QUALCOMM INC0 citations46
US12386382B2Aug 12, 2025
Reduced training for main band chip module interconnection clock lines
QUALCOMM INC0 citations46
US12380047B2Aug 5, 2025
Expanded data link width for main band chip module connection in alternate modes
QUALCOMM INC0 citations46