Inventor

DULONG CAROLE

US66 patents

⚠️ This page may combine multiple inventors who share the name “DULONG CAROLE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DULONG CAROLE

INTEL CORP

Method for performing multiply-add operations on packed data

Method and apparatus for performing multiply-subtract operations on packed data

Method and apparatus for performing multiply-add operations on packed data

Selective writing of data elements from packed data based upon a mask using predication

Method and apparatus for multiplying and accumulating data samples and complex coefficients

Method and apparatus for multiplying and accumulating complex numbers in a digital filter

Method and apparatus for storing complex numbers to allow for efficient complex multiplication operations and performing such complex multiplication operations

Method of sorting numbers to obtain maxima/minima values with ordering

Memory transfer apparatus and method useful within a pattern recognition system

Method and apparatus for executing two types of instructions that specify registers of a shared logical register file in a stack and a non-stack referenced manner

Apparatus for performing multiply-add operations on packed data

Apparatus for performing multiply-add operations on packed data

Method for executing different sets of instructions that cause a processor to perform different data type operations on different physical registers files that logically appear to software as a single aliased register file

Method and apparatus for performing multiply and accumulate operations on packed data

Data manipulation instruction for enhancing value and efficiency of complex arithmetic

Method and apparatus for multiplying and accumulating complex numbers in a digital filter

Data manipulation instruction for enhancing value and efficiency of complex arithmetic

Method for executing instructions that operate on different data types stored in the same single logical register file

Emulation of an instruction set on an instruction set architecture transition

System for signal processing using multiply-add operations

Computer system for performing complex digital filters

Emptying packed data state during execution of packed data instructions

Computer implemented method for transferring packed data between register files and memory

Memory transfer apparatus and method useful within a pattern recognition system

Method for transposing a two-dimensional array

Manipulating video and audio signals using a processor which supports SIMD instructions

Method and apparatus employing Viterbi scoring using SIMD instructions for data recognition

Executing different instructions that cause different data type operations to be performed on single logical register file

System and method of pattern recognition employing a multiprocessing pipelined apparatus with private pattern memory

Method and apparatus for multiplying and accumulating complex numbers in a digital filter

Computer system performing a two-dimensional rotation of packed data representing multimedia information

Method for performing complex fast fourier transforms (FFT&#39;s)

Pattern recognition system using a four address arithmetic logic unit

Apparatus and method for a four address arithmetic unit

Method and apparatus for executing control flow instructions in a control flow pipeline in parallel with arithmetic instructions being executed in arithmetic pipelines

Processor for performing multiply-add operations on packed data

Methods and apparatus for retrieving images from a large collection of images

Method and apparatus for performing multiply-add operations on packed data

Processor with instructions that operate on different data types stored in the same single logical register file

Emptying packed data state during execution of packed data instructions

Method of sorting numbers to obtain maxima/minima values with ordering

Method of sorting signed numbers and solving absolute differences using packed instructions

Method for performing multiply-substrate operations on packed data

Microarchitecture for implementing an instruction to clear the tags of a stack reference register file

Processor with instructions that operate on different data types stored in the same single logical register file

Code sequence for vector gather and scatter

EVANS & SUTHERLAND COMPUTER CO

Variable delay branch system

Multiprocessor task scheduling system

OGALE ABHIJIT S

Street-level imagery acquisition and selection

PELEG ALEXANDER

Processor for performing multiply-add operations on packed data

Method for performing complex fast fourier transforms (FFT's)