Inventor

SINHA NISHANT

IN140 patents

⚠️ This page may combine multiple inventors who share the name “SINHA NISHANT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SINHA NISHANT

MICRON TECHNOLOGY INC

Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias

Semiconductor component having encapsulated, bonded, interconnect contacts

Slurry for use in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods

Methods of forming conductive through-wafer vias

Conductive through wafer vias

Method of fabricating semiconductor component having encapsulated, bonded, interconnect contacts

Slurry for use with fixed-abrasive polishing pads in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods

Methods of fabricating substrates including one or more conductive vias

Semiconductor processing methods for forming electrical contacts

Methods of forming conductive through-wafer vias

Microelectronic devices with improved heat dissipation and methods for cooling microelectronic devices

Interconnect structures for integration of multi-layered integrated circuit devices and methods for forming the same

Methods for forming conductive vias in semiconductor device components

Semiconductor device components with conductive vias and systems including the components

Semiconductor structures

Methods of fabricating substrates including at least one conductive via

Slurry for use in polishing semiconductor device conductive structures that include copper and tungsten and polishing methods

Filling plugs through chemical mechanical polish

Activation of oxides for electroless plating

Activation of oxides for electroless plating

High aspect ratio fill method and resulting structure

Constructions comprising solder bumps

Filling plugs through chemical mechanical polish

High aspect ratio fill method and resulting structure

Methods of forming spaced conductive regions, and methods of forming capacitor constructions

Semiconductor devices comprising interconnect structures and methods of fabrication

Multi-tiered semiconductor devices and associated methods

Rheological fluids for particle removal

Method of selectively removing conductive material

Selective metal deposition over dielectric layers

Methods of uniformly removing silicon oxide and a method of removing a sacrificial oxide

Methods for planarization of group VIII metal-containing surfaces using complexing agents

Methods of forming electrically conductive structures

Methods of fabricating substrates including at least one conductive via

Method for fabricating semiconductor components having encapsulated, bonded, interconnect contacts on redistribution contacts

SINHA NISHANT

Methods for forming three-dimensional memory devices, and related structures

Multi-tiered semiconductor devices and associated methods

Modular bug detection with inertial refinement

Methods of removing silicon dioxide

Methods for forming conductive vias in semiconductor device components

Symbolic program analysis using term rewriting and generalization

TANG SANH D

Memories and their formation

Multi-cell vertical memory nodes

Memories with memory arrays extending in opposite directions from a semiconductor and their formation

SANDHU GURTEJ S

Methods for forming interconnect structures for integration of multi-layered integrated circuit devices

IBM

Backup optimization in hybrid storage environment

KAHLON VINEET

Fast and accurate data race detection for concurrent programs with asynchronous calls

BALAKRISHNAN GOGUL

Embedding class hierarchy into object models for multiple class inheritance

CHANDRA SATISH

Generating test cases for covering enterprise rules and predicates

ROUND ROCK RES LLC

Through-hole contacts in a semiconductor device