Inventor
HUANG HSIN-CHIEN
TW13 patents
Patents
13 patentsUS6459150B1Oct 1, 2002
Electronic substrate having an aperture position through a substrate, conductive pads, and an insulating layer
IND TECH RES INST125 citations97
US6433427B1Aug 13, 2002
Wafer level package incorporating dual stress buffer layers for I/O redistribution and method for fabrication
IND TECH RES INST110 citations96
US7329563B2Feb 12, 2008
Method for fabrication of wafer level package incorporating dual compliant layers
IND TECH RES INST34 citations92
US6914333B2Jul 5, 2005
Wafer level package incorporating dual compliant layers and method for fabrication
IND TECH RES INST45 citations92
US6358836B1Mar 19, 2002
Wafer level package incorporating elastomeric pads in dummy plugs
IND TECH RES INST42 citations89
US6166435ADec 26, 2000
Flip-chip ball grid array package with a heat slug
IND TECH RES INST25 citations89
US6312974B1Nov 6, 2001
Simultaneous bumping/bonding process utilizing edge-type conductive pads and device fabricated
IND TECH RES INST30 citations88
US6218726B1Apr 17, 2001
Built-in stress pattern on IC dies and method of forming
IND TECH RES INST6 citations62
US11086881B2Aug 10, 2021
Method and device for analyzing data
IND TECH RES INST0 citations49
US12548057B2Feb 10, 2026
Assortment planning method, assortment planning system and processing apparatus thereof for smart store
IND TECH RES INST0 citations44
US11561323B2Jan 24, 2023
Intelligent storage device and intelligent storage method
IND TECH RES INST0 citations41
US11551289B2Jan 10, 2023
Intelligent store system and intelligent store method
IND TECH RES INST0 citations41
US10984376B2Apr 20, 2021
Storage device and storage method to identify object using sensing data and identification model
IND TECH RES INST0 citations39