Inventor

MITRA SUBHASISH

US20 patents

⚠️ This page may combine multiple inventors who share the name “MITRA SUBHASISH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MITRA SUBHASISH

INTEL CORP

System and scanout circuits with error resilience circuit

System and shadow circuits with output joining circuit

Compacting circuit responses

System pulse latch and shadow pulse latch coupled to output joining circuit

Error detecting circuit

System and shadow bistable circuits coupled to output joining circuit

Error-detection flip-flop

Compacting circuit responses

Stimulus generation

UNIV LELAND STANFORD JUNIOR

Word voter for redundant systems

System and method for testing a logic-based processing device

Post-silicon validation and debug using symbolic quick error detection

Nanotube logic circuits

Apparatus for detecting bugs in logic-based processing devices

System-level validation of systems-on-a-chip (SoC)

COMMISSARIAT ENERGIE ATOMIQUE

Circuit and method for programming resistive memory cells

Reconfigurable memory module designed to implement computing operations

MITRA SUBHASISH

Compacting circuit responses

Multiple carbon nanotube transfer and its applications for making high-performance carbon nanotube field-effect transistor (CNFET), transparent electrodes, and three-dimensional integration of CNFETs

PATIL NISHANT

System and method for analyzing a nanotube logic circuit