Inventor

ARNOLD ROGER D

US16 patents

⚠️ This page may combine multiple inventors who share the name “ARNOLD ROGER D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INFINEON TECHNOLOGIES AG

7 patents

US7062606B2Jun 13, 2006

Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking events

INFINEON TECHNOLOGIES AG23 citations92

US7263599B2Aug 28, 2007

Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation

INFINEON TECHNOLOGIES AG4 citations61

SIEMENS AG

3 patents

US6128641AOct 3, 2000

Data processing unit with hardware assisted context switching capability

SIEMENS AG80 citations95

US6175913B1Jan 16, 2001

Data processing unit with debug capabilities using a memory protection unit

SIEMENS AG32 citations92

US6041387AMar 21, 2000

Apparatus for read/write-access to registers having register file architecture in a central processing unit

SIEMENS AG15 citations74

INFINEON TECHNOLOGIES CORP

3 patents

US6434689B2Aug 13, 2002

Data processing unit with interface for sharing registers by a processor and a coprocessor

INFINEON TECHNOLOGIES CORP40 citations91

US6292845B1Sep 18, 2001

Processing unit having independent execution units for parallel execution of instructions of different category with instructions having specific bits indicating instruction size and category respectively

INFINEON TECHNOLOGIES CORP30 citations89

US6378065B1Apr 23, 2002

Apparatus with context switching capability

INFINEON TECHNOLOGIES CORP18 citations83

UBICOM INC

2 patents

US7047396B1May 16, 2006

Fixed length memory to memory arithmetic and architecture for a communications embedded processor system

UBICOM INC34 citations91

US7546442B1Jun 9, 2009

Fixed length memory to memory arithmetic and architecture for direct memory access using fixed length instructions

UBICOM INC14 citations83

ARNOLD ROGER D

1 patent

US4583725AApr 22, 1986

Patient support frame for posterior lumbar laminectomy

ARNOLD ROGER D66 citations93

ARNOLD ROGER D

INFINEON TECHNOLOGIES AG

Multi-threaded embedded processor using deterministic instruction memory to guarantee execution of pre-selected threads during blocking events

Thread ID in a multithreaded processor

Variable length instruction pipeline

Zero-overhead loop operation in microprocessor having instruction buffer

Program tracing in a multithreaded processor

Variable length instruction pipeline

Interrupt and trap handling in an embedded multi-thread processor to avoid priority inversion and maintain real-time operation

SIEMENS AG

Data processing unit with hardware assisted context switching capability

Data processing unit with debug capabilities using a memory protection unit

Apparatus for read/write-access to registers having register file architecture in a central processing unit

INFINEON TECHNOLOGIES CORP

Data processing unit with interface for sharing registers by a processor and a coprocessor

Processing unit having independent execution units for parallel execution of instructions of different category with instructions having specific bits indicating instruction size and category respectively

Apparatus with context switching capability

UBICOM INC

Fixed length memory to memory arithmetic and architecture for a communications embedded processor system

Fixed length memory to memory arithmetic and architecture for direct memory access using fixed length instructions

ARNOLD ROGER D

Patient support frame for posterior lumbar laminectomy