Inventor
STAMM REBECCA L
US12 patents
⚠️ This page may combine multiple inventors who share the name “STAMM REBECCA L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
DIGITAL EQUIPMENT CORP
10 patentsUS5432918AJul 11, 1995
Method and apparatus for ordering read and write operations using conflict bits in a write queue
DIGITAL EQUIPMENT CORP213 citations98
US5404482AApr 4, 1995
Processor and method for preventing access to a locked memory block by recording a lock in a content addressable memory with outstanding cache fills
DIGITAL EQUIPMENT CORP208 citations98
US5347648ASep 13, 1994
Ensuring write ordering under writeback cache error conditions
DIGITAL EQUIPMENT CORP188 citations97
US5148536ASep 15, 1992
Pipeline having an integral cache which processes cache misses and loads data in parallel
DIGITAL EQUIPMENT CORP126 citations97
US5481689AJan 2, 1996
Conversion of internal processor register commands to I/O space addresses
DIGITAL EQUIPMENT CORP95 citations96
US5404483AApr 4, 1995
Processor and method for delaying the processing of cache coherency transactions during outstanding cache fills
DIGITAL EQUIPMENT CORP119 citations96
US5317720AMay 31, 1994
Processor system with writeback cache using writeback and non writeback transactions stored in separate queues
DIGITAL EQUIPMENT CORP168 citations96
US5058006AOct 15, 1991
Method and apparatus for filtering invalidate requests
DIGITAL EQUIPMENT CORP86 citations95
US5430888AJul 4, 1995
Pipeline utilizing an integral cache for transferring data to and from a register
DIGITAL EQUIPMENT CORP65 citations94
US5155843AOct 13, 1992
Error transition mode for multi-processor system
DIGITAL EQUIPMENT CORP143 citations94