P

Inventor

DUNN JAMES S

US55 patents
⚠️ This page may combine multiple inventors who share the name “DUNN JAMES S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

39 patents
US6900519B2May 31, 2005

Diffused extrinsic base and method for fabrication

IBM95 citations97
US5981148ANov 9, 1999

Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby

IBM49 citations96
US6521506B1Feb 18, 2003

Varactors for CMOS and BiCMOS technologies

IBM41 citations95
US7262484B2Aug 28, 2007

Structure and method for performance improvement in vertical bipolar transistors

IBM17 citations93
US7064416B2Jun 20, 2006

Semiconductor device and method having multiple subcollectors formed on a common wafer

IBM16 citations93
US7002221B2Feb 21, 2006

Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same

IBM17 citations93
US8722508B2May 13, 2014

Low harmonic RF switch in SOI

IBM23 citations92
US6906401B2Jun 14, 2005

Method to fabricate high-performance NPN transistors in a BiCMOS process

IBM19 citations92
US6809024B1Oct 26, 2004

Method to fabricate high-performance NPN transistors in a BiCMOS process

IBM24 citations92
US6476483B1Nov 5, 2002

Method and apparatus for cooling a silicon on insulator device

IBM35 citations92
US6096618AAug 1, 2000

Method of making a Schottky diode with sub-minimum guard ring

IBM26 citations92
US5976768ANov 2, 1999

Method for forming sidewall spacers using frequency doubling hybrid resist and device formed thereby

IBM31 citations92
US6891251B2May 10, 2005

Varactors for CMOS and BiCMOS technologies

IBM16 citations90
US9355972B2May 31, 2016

Method for making a dielectric region in a bulk silicon substrate providing a high-Q passive resonator

IBM8 citations84
US7776704B2Aug 17, 2010

Method to build self-aligned NPN in advanced BiCMOS technology

IBM12 citations84
US7303968B2Dec 4, 2007

Semiconductor device and method having multiple subcollectors formed on a common wafer

IBM13 citations84
US7253096B2Aug 7, 2007

Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same

IBM11 citations84
US6448124B1Sep 10, 2002

Method for epitaxial bipolar BiCMOS

IBM16 citations84
US6420766B1Jul 16, 2002

Transistor having raised source and drain

IBM18 citations84
US9653477B2May 16, 2017

Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming

IBM6 citations83
US9646993B2May 9, 2017

Single-chip field effect transistor (FET) switch with silicon germanium (SiGe) power amplifier and methods of forming

IBM7 citations83
US6100013AAug 8, 2000

Method for forming transistors with raised source and drains and device formed thereby

IBM14 citations80
US7265018B2Sep 4, 2007

Method to build self-aligned NPN in advanced BiCMOS technology

IBM9 citations74
US6255178B1Jul 3, 2001

Method for forming transistors with raised source and drains and device formed thereby

IBM9 citations74
US5882977AMar 16, 1999

Method of forming a self-aligned, sub-minimum isolation ring

IBM16 citations74
US5631495AMay 20, 1997

High performance bipolar devices with plurality of base contact regions formed around the emitter layer

IBM11 citations68
US8956945B2Feb 17, 2015

Trench isolation for bipolar junction transistors in BiCMOS technology

IBM3 citations63
US8857022B2Oct 14, 2014

Method of manufacturing complimentary metal-insulator-metal (MIM) capacitors

IBM3 citations63
US7932155B2Apr 26, 2011

Structure and method for performance improvement in vertical bipolar transistors

IBM2 citations63
US7898061B2Mar 1, 2011

Structure for performance improvement in vertical bipolar transistors

IBM2 citations63
US6869854B2Mar 22, 2005

Diffused extrinsic base and method for fabrication

IBM5 citations62
US7135375B2Nov 14, 2006

Varactors for CMOS and BiCMOS technologies

IBM4 citations61
US6683345B1Jan 27, 2004

Semiconductor device and method for making the device having an electrically modulated conduction channel

IBM6 citations61
US9818688B2Nov 14, 2017

Dielectric region in a bulk silicon substrate providing a high-Q passive resonator

IBM0 citations52
US9437539B2Sep 6, 2016

Dielectric region in a bulk silicon substrate providing a high-Q passive resonator

IBM0 citations52
US9269787B2Feb 23, 2016

Base profile of self-aligned bipolar transistors for power amplifier applications

IBM0 citations52
US9105677B2Aug 11, 2015

Base profile of self-aligned bipolar transistors for power amplifier applications

IBM1 citations52
US8872305B2Oct 28, 2014

Integrated circuit structure having air-gap trench isolation and related design structure

IBM0 citations52
US9257324B2Feb 9, 2016

Forming structures on resistive substrates

IBM0 citations51

DUNN JAMES S

3 patents

BOTULA ALAN B

2 patents

GLOBALFOUNDRIES INC

2 patents

THOMAS & BETTS CORP

2 patents

COONEY III EDWARD C

1 patent

GLOBALFOUNDARIES INC

1 patent

Showing the top 50 of 55 patents by PatentIndex Score.