Inventor
RIGAL DOMINIQUE
FR14 patents
⚠️ This page may combine multiple inventors who share the name “RIGAL DOMINIQUE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
9 patentsUS5684797ANov 4, 1997
ATM cell multicasting method and apparatus
IBM96 citations95
US6003060ADec 14, 1999
Method and apparatus to share resources while processing multiple priority data flows
IBM52 citations92
US5666361ASep 9, 1997
ATM cell forwarding and label swapping method and apparatus
IBM34 citations91
US5768273AJun 16, 1998
Method and apparatus for priority level queueing in processing ATM cell header and payload
IBM14 citations73
US6907007B2Jun 14, 2005
Method of injecting/extracting control cells in an asynchronous transfer mode (ATM) network
IBM2 citations61
US4961189AOct 2, 1990
Multiplexing system setting through mask registers
IBM3 citations61
US6680951B1Jan 20, 2004
System and method for selecting multi-rate ports in a data transmission network
IBM3 citations60
US6982958B2Jan 3, 2006
Method for transmitting loopback cells through a switching node of an asynchronous transfer mode (ATM) network
IBM5 citations59
US6772371B1Aug 3, 2004
On-line debugging system in a switching node of a data transmission network
IBM0 citations39
RIGAL DOMINIQUE
3 patentsUS8080242B2Dec 20, 2011
Anti-HPA
RIGAL DOMINIQUE2 citations55
US8563704B2Oct 22, 2013
Peptide aptamer for neutralizing the binding of platelet antigen specific antibodies and diagnostic and therapeutic applications containing the same
RIGAL DOMINIQUE0 citations39
US8183055B2May 22, 2012
Peptide aptamer for neutralizing the binding of platelet antigen specific antibodies and diagnostic and therapeutic applications containing the same
RIGAL DOMINIQUE0 citations39
BULL SAS
2 patentsUS11016915B2May 25, 2021
Method for sending by an upstream device to a downstream device data from a virtual channel sharing a same input buffer memory of the downstream device, corresponding computer program and system
BULL SAS0 citations51
US11621906B2Apr 4, 2023
Method for test traffic generation and inspection, and associated switch input or output port and switch
BULL SAS0 citations41