Inventor
WALLS LLOYD A
US27 patents
⚠️ This page may combine multiple inventors who share the name “WALLS LLOYD A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
21 patentsUS5530377AJun 25, 1996
Method and apparatus for active termination of a line driver/receiver
IBM99 citations96
US5635761AJun 3, 1997
Internal resistor termination in multi-chip module environments
IBM57 citations95
US5506457AApr 9, 1996
Electronic switch for decoupling capacitor
IBM27 citations92
US5541534AJul 30, 1996
Mixed voltage interface converter
IBM23 citations91
US5541535AJul 30, 1996
CMOS simultaneous transmission bidirectional driver/receiver
IBM42 citations91
US5534812AJul 9, 1996
Communication between chips having different voltage levels
IBM28 citations91
US4862077AAug 29, 1989
Probe card apparatus and method of providing same with reconfigurable probe card circuitry
IBM29 citations86
US7863724B2Jan 4, 2011
Circuit substrate having post-fed die side power supply connections
IBM11 citations82
US10795573B2Oct 6, 2020
Method and apparatus for virtual braille keyboard
IBM2 citations66
US4459609AJul 10, 1984
Charge-stabilized memory
IBM5 citations62
US9368852B2Jun 14, 2016
Method for performing frequency band splitting
IBM2 citations61
US8358509B2Jan 22, 2013
Reduced wiring requirements with signal slope manipulation
IBM2 citations60
US10620253B2Apr 14, 2020
Noise modulation for on-chip noise measurement
IBM0 citations51
US9835665B2Dec 5, 2017
Noise modulation for on-chip noise measurement
IBM0 citations51
US9797938B2Oct 24, 2017
Noise modulation for on-chip noise measurement
IBM0 citations51
US9536604B1Jan 3, 2017
Impedance matching system for DDR memory
IBM1 citations51
US9893400B2Feb 13, 2018
Method for performing frequency band splitting
IBM1 citations50
US8722536B2May 13, 2014
Fabrication method for circuit substrate having post-fed die side power supply connections
IBM0 citations50
US9548769B2Jan 17, 2017
Reduced wiring requirements with signal slope manipulation
IBM0 citations49
US9209583B2Dec 8, 2015
Multi-level connector and use thereof that mitigates data signaling reflections
IBM0 citations48
US10705134B2Jul 7, 2020
High speed chip substrate test fixture
IBM0 citations36