P

Inventor

DOROW CHELSEY

US15 patents

Patents

15 patents
US12396254B2Aug 19, 2025

Stacked 2D CMOS with inter metal layers

INTEL CORP1 citations63
US12396217B2Aug 19, 2025

Encapsulation for transition metal dichalcogenide nanosheet transistor and methods of fabrication

INTEL CORP1 citations63
US12349442B2Jul 1, 2025

Thin film transistors having semiconductor structures integrated with 2D channel materials

INTEL CORP0 citations62
US12278289B2Apr 15, 2025

TMD inverted nanowire integration

INTEL CORP0 citations62
US12176388B2Dec 24, 2024

Transition metal dichalcogenide nanowires and methods of fabrication

INTEL CORP0 citations62
US11935956B2Mar 19, 2024

TMD inverted nanowire integration

INTEL CORP0 citations62
US11908950B2Feb 20, 2024

Charge-transfer spacers for stacked nanoribbon 2D transistors

INTEL CORP0 citations62
US12432976B2Sep 30, 2025

Thin film transistors having strain-inducing structures integrated with 2D channel materials

INTEL CORP0 citations61
US12369382B2Jul 22, 2025

Integrated circuit structures with graphene contacts

INTEL CORP0 citations61
US12266720B2Apr 1, 2025

Transistors with monocrystalline metal chalcogenide channel materials

INTEL CORP0 citations61
US12588257B2Mar 24, 2026

2D layered gate oxide

INTEL CORP0 citations60
US12349438B2Jul 1, 2025

Contact gating for 2D field effect transistors

INTEL CORP0 citations51
US12266712B2Apr 1, 2025

Transition metal dichalcogenide nanosheet transistors and methods of fabrication

INTEL CORP0 citations51
US12125895B2Oct 22, 2024

Transition metal dichalcogenide (TMD) layer stack for transistor applications and methods of fabrication

INTEL CORP0 citations51
US12575111B2Mar 10, 2026

Back-end-of-line 2D memory cell

INTEL CORP0 citations50