Inventor

KENNEY DONALD M

US42 patents

⚠️ This page may combine multiple inventors who share the name “KENNEY DONALD M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KENNEY DONALD M

IBM

Porous silicon trench and capacitor structures

Method of making a high density V-MOS memory array

Method of making shadow RAM cell having a shallow trench EEPROM

Self-aligned buried strap for trench type DRAM cells

Low temperature plasma oxidation process

Process for defining organic sidewall structures

Shadow ram cell having a shallow trench eeprom

Porous silicon trench and capacitor structures

Stacked devices

Low temperature plasma oxidation process

Vertical epitaxial SOI transistor, memory cell and fabrication methods

Diffused buried plate trench dram cell array

Process of making and using micro mask

Trench interconnect for CMOS diffusion regions

Method of making a dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes

Semiconductor trench capacitor cell with merged isolation and node trench construction

Dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes

High density memory with field shield

Method of forming borderless contacts using a removable mandrel

V-MOS Device with self-aligned multiple electrodes

Micro mask comprising agglomerated material

Semiconductor trench capacitor cell having a buried strap

Non-conformal and oxidizable etch stops for submicron features

Method of making diffused buried plate trench DRAM cell array

Charge amplifying trench memory cell

Charge amplifying trench memory cell

Method for providing self-aligned conductor in a V-groove device

Semiconductor trench capacitor cell having a buried strap

Angle defined trench conductor for a semiconductor device

Two square memory cells having highly conductive word lines

Sequential shared access lines memory cells

Single transistor driver circuit

Dense dynamic memory cell structure and process

Method for preparing a narrow angle defined trench in a substrate

Process for making complementary transistors by sequential implantations using oxidation barrier masking layer

Two square memory cells

Sidewall strap

(unassigned)

SOI fabrication method

Vertical precharge structure for DRAM

Memory precharge scheme using spare column

Low charge consumption memory

Trench capacitor precharge structure and leakage shield