Inventor

WOO CHRISTY MEI-CHU

US79 patents

⚠️ This page may combine multiple inventors who share the name “WOO CHRISTY MEI-CHU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WOO CHRISTY MEI-CHU

ADVANCED MICRO DEVICES INC

Method of forming low resistance barrier on low k interconnect with electrolessly plated copper seed layer

Copper interconnects with metal capping layer and selective copper alloys

Gate dielectric quality for replacement metal gate transistors

Process for forming fully silicided gates

Method of manufacturing a semiconductor device having copper interconnects

Electroplating uniformity by diffuser design

Protection low-k ILD during damascene processing with thin liner

Nitrogen oxide plasma treatment for reduced nickel silicide bridging

Conformal barrier liner in an integrated circuit interconnect

Method of promoting void free copper interconnects

Method for improving seed layer electroplating for semiconductor

Slurry for chemical mechanical polishing of copper

Chemical-mechanical polishing slurry formulation and method for tungsten and titanium thin films

Composite tantalum capped inlaid copper with reduced electromigration and reduced stress migration

Conformal barrier liner in an integrated circuit interconnect

Protection of low-k ILD during damascene processing with thin liner

Integrated plasma treatment and nickel deposition and tool for performing same

Method of forming low resistance barrier on low k interconnect

Barrier metal integrity testing using a dual level line to line leakage testing pattern and partial CMP

Via formation in integrated circuit interconnects

Copper interconnects with improved electromigration resistance and low resistivity

Nitrogen oxide plasma treatment for reduced nickel silicide bridging

Method for implanting semiconductor conductive layers

Cu interconnects with composite barrier layers for wafer-to-wafer uniformity

Method of manufacturing semiconductor device comprising silicon-rich tasin metal gate electrode

Copper interconnect with improved barrier layer

Nickel silicide process using non-reactive spacer

Barrier layer integrity test

Fully nickel silicided metal gate with shallow junction formed

HDP treatment for reduced nickel silicide bridging

Utilization of annealing enhanced or repaired seed layer to improve copper interconnect reliability

Dual layer silicide formation using a titanium barrier to reduce surface roughness at silicide/junction interface

Dual layer nickel deposition using a cobalt barrier to reduce surface roughness at silicide/junction interface

Double silicide formation in polysicon gate without silicide in source/drain extensions

Selective copper alloy deposition

Tungsten silicide barrier for nickel silicidation of a gate electrode

NH3/N2-plasma treatment for reduced nickel silicide bridging

Storage-annealing plated CU interconnects

Method of forming a void free copper interconnects

Point of use mixing for LI/plug tungsten polishing slurry to improve existing slurry

Composite barrier layers with controlled copper interface surface roughness

Composite tantalum nitride/tantalum copper capping layer

Method of forming composite barrier layers with controlled copper interface surface roughness

One step deposition method for high-k dielectric and metal gate electrode

Reactive pre-clean using reducing gas during nickel silicide process

Selective deposition in integrated circuit interconnects

Nickel silicide process using UDOX to prevent silicide shorting

Plating system with secondary ring anode for a semiconductor wafer

AMD

Copper/low dielectric interconnect formation with reduced electromigration

ADVANCE MICRO DEVICES INC

Graded low-k middle-etch stop layer for dual-inlaid patterning