Inventor
WILLIAMS THOMAS WALTER
4 patents
Patents
4 patentsUS4063080ADec 13, 1977
Method of propagation delay testing a level sensitive array logic system
IBM48 citations93
US4051352ASep 27, 1977
Level sensitive embedded array logic system
IBM41 citations93
US4074851AFeb 21, 1978
Method of level sensitive testing a functional logic system with embedded array
IBM35 citations89
US4071902AJan 31, 1978
Reduced overhead for clock testing in a level system scan design (LSSD) system
IBM23 citations80