Inventor
HARPER PETER R
US24 patents
⚠️ This page may combine multiple inventors who share the name “HARPER PETER R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FREESCALE SEMICONDUCTOR INC
8 patentsUS6812580B1Nov 2, 2004
Semiconductor package having optimized wire bond positioning
FREESCALE SEMICONDUCTOR INC117 citations98
US6998952B2Feb 14, 2006
Inductive device including bond wires
FREESCALE SEMICONDUCTOR INC137 citations97
US6844631B2Jan 18, 2005
Semiconductor device having a bond pad and method therefor
FREESCALE SEMICONDUCTOR INC161 citations95
US7138328B2Nov 21, 2006
Packaged IC using insulated wire
FREESCALE SEMICONDUCTOR INC46 citations92
US6937047B2Aug 30, 2005
Integrated circuit with test pad structure and method of testing
FREESCALE SEMICONDUCTOR INC36 citations90
US6921979B2Jul 26, 2005
Semiconductor device having a bond pad and method therefor
FREESCALE SEMICONDUCTOR INC27 citations89
US7271013B2Sep 18, 2007
Semiconductor device having a bond pad and method therefor
FREESCALE SEMICONDUCTOR INC17 citations88
US7015585B2Mar 21, 2006
Packaged integrated circuit having wire bonds and method therefor
FREESCALE SEMICONDUCTOR INC2 citations61
MAXIM INTEGRATED PRODUCTS
7 patentsUS9324687B1Apr 26, 2016
Wafer-level passive device integration
MAXIM INTEGRATED PRODUCTS26 citations93
US9322901B2Apr 26, 2016
Multichip wafer level package (WLP) optical device
MAXIM INTEGRATED PRODUCTS19 citations92
US8878350B1Nov 4, 2014
Semiconductor device having a buffer material and stiffener
MAXIM INTEGRATED PRODUCTS3 citations61
US9230903B2Jan 5, 2016
Multi-die, high current wafer level package
MAXIM INTEGRATED PRODUCTS0 citations52
US9087779B2Jul 21, 2015
Multi-die, high current wafer level package
MAXIM INTEGRATED PRODUCTS1 citations52
US9806047B2Oct 31, 2017
Wafer level device and method with cantilever pillar structure
MAXIM INTEGRATED PRODUCTS1 citations51
US9837368B2Dec 5, 2017
Enhanced board level reliability for wafer level packages
MAXIM INTEGRATED PRODUCTS0 citations41
TEXAS INSTRUMENTS INC
5 patentsUS8049320B2Nov 1, 2011
Integrated circuit stacked package precursors and stacked packaged devices and systems therefrom
TEXAS INSTRUMENTS INC9 citations82
US7919860B2Apr 5, 2011
Semiconductor device having wafer level chip scale packaging substrate decoupling
TEXAS INSTRUMENTS INC8 citations82
US8377746B2Feb 19, 2013
Integrated circuit stacked package precursors and stacked packaged devices and systems therefrom
TEXAS INSTRUMENTS INC3 citations61
US8053349B2Nov 8, 2011
BGA package with traces for plating pads under the chip
TEXAS INSTRUMENTS INC3 citations59
US8828799B2Sep 9, 2014
Method of forming an integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect pad
TEXAS INSTRUMENTS INC0 citations49