Inventor

JACQUET FRANCOIS

FR34 patents

⚠️ This page may combine multiple inventors who share the name “JACQUET FRANCOIS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JACQUET FRANCOIS

ST MICROELECTRONICS SA

Memory circuit comprising an error correcting code

Multivibrator protected against current or voltage spikes

Memory with storage cells biased in groups

Dram cell reading method and device

Read-only memory with twisted bit lines

SRAM memory device with improved write operation and method thereof

Dynamic random access memory device and process for controlling a read access of such a memory

Circuit for distributing an initial signal with a tree structure, protected against logic random events

Read-only memory

Integrated circuit component, protected against random logic events, and associated method of manufacture

Method and device for voltage multiplication

SRAM memory cell protected against current or voltage spikes

Implementation of a multivibrator protected against current or voltage spikes

Memory circuit with shared redundancy

Nonvolatile SRAM memory cell

Content addressable memory circuit with improved memory cell stability

DRAM refreshment

SRAM memory cell protected against current or voltage spikes

Memory device of SRAM type

Logic cell protected against random events

Multivibrator protected against current or voltage spikes

Fast bistable circuit protected against random events

Memory device with programmable control for activation of read amplifiers

Integrated dynamic random access memory element, array and process for fabricating such elements

Memory integrated circuit, in particular an SRAM memory integrated circuit, and corresponding fabrication process

Dynamically unbalanced sense amplifier

CAM cells and CAM matrix made up of a network of such memory cells

ST MICROELECTRONICS INC

SRAM with switchable power supply sets of voltages

Programmable SRAM source bias scheme for use with switchable SRAM power supply sets of voltages

Robust SRAM memory cell capacitor plate voltage generator

JACQUET FRANCOIS

Network on chip building bricks

Interconnection network with dynamic sub-networks

DRAY CYRILLE

Method for implementing an SRAM memory information storage device

WALSH KEVIN K

Robust SRAM memory cell capacitor plate voltage generator