Inventor
BOLYN PHILIP C
US9 patents
Patents
9 patentsUS5761703AJun 2, 1998
Apparatus and method for dynamic memory refresh
UNISYS CORP94 citations96
US6233665B1May 15, 2001
Mapping shared DRAM address bits by accessing data memory in page mode cache status memory in word mode
UNISYS CORP58 citations95
US6049856AApr 11, 2000
System for simultaneously accessing two portions of a shared memory
UNISYS CORP58 citations95
US6006296ADec 21, 1999
Scalable memory controller
UNISYS CORP25 citations89
US5920898AJul 6, 1999
Memory control unit providing optimal timing of memory control sequences between different memory segments by optimally selecting among a plurality of memory requests
UNISYS CORP43 citations89
US6092165AJul 18, 2000
Memory control unit using a programmable shift register for generating timed control signals
UNISYS CORP16 citations83
US5907863AMay 25, 1999
Memory control unit using preloaded values to generate optimal timing of memory control sequences between different memory segments
UNISYS CORP17 citations83
US6560675B1May 6, 2003
Method for controlling concurrent cache replace and return across an asynchronous interface
UNISYS CORP16 citations80
US5757817AMay 26, 1998
Memory controller having automatic RAM detection
UNISYS CORP14 citations70